Lines Matching refs:Reg0
2167 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLD() local
2189 Ops.push_back(Reg0); in SelectVLD()
2192 Ops.push_back(Reg0); in SelectVLD()
2205 const SDValue OpsA[] = { MemAddr, Align, Reg0, ImplDef, Pred, Reg0, Chain }; in SelectVLD()
2218 Ops.push_back(Reg0); in SelectVLD()
2222 Ops.push_back(Reg0); in SelectVLD()
2302 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVST() local
2349 Ops.push_back(Reg0); in SelectVST()
2353 Ops.push_back(Reg0); in SelectVST()
2378 const SDValue OpsA[] = { MemAddr, Align, Reg0, RegSeq, Pred, Reg0, Chain }; in SelectVST()
2393 Ops.push_back(Reg0); in SelectVST()
2397 Ops.push_back(Reg0); in SelectVST()
2474 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDSTLane() local
2483 Ops.push_back(IsImmUpdate ? Reg0 : Inc); in SelectVLDSTLane()
2507 Ops.push_back(Reg0); in SelectVLDSTLane()
3012 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDDup() local
3026 Ops.push_back(Reg0); in SelectVLDDup()
3036 const SDValue OpsA[] = {MemAddr, Align, Pred, Reg0, Chain}; in SelectVLDDup()
3043 const SDValue OpsA[] = {MemAddr, Align, ImplDef, Pred, Reg0, Chain}; in SelectVLDDup()
3051 Ops.push_back(Reg0); in SelectVLDDup()
3366 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3374 getAL(CurDAG, dl), Reg0, Reg0 }; in tryV6T2BitfieldExtractOp()
3385 getAL(CurDAG, dl), Reg0, Reg0 }; in tryV6T2BitfieldExtractOp()
3394 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3414 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3419 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3436 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3441 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3457 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3462 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3807 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
3809 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG, dl), Reg0, Reg0 }; in Select()
3813 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG, dl), Reg0, in Select()
3814 Reg0 }; in Select()
3826 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
3828 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG, dl), Reg0, Reg0 }; in Select()
3832 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG, dl), Reg0, in Select()
3833 Reg0 }; in Select()
5191 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
5192 SDValue Ops[] = { Src, Src, Pred, Reg0 }; in Select()
5202 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
5203 SDValue Ops[] = { Src, Pred, Reg0 }; in Select()
5781 Register Reg0 = cast<RegisterSDNode>(V0)->getReg(); in tryInlineAsm() local
5803 SDValue T0 = CurDAG->getCopyToReg(Sub0, dl, Reg0, Sub0, in tryInlineAsm()
5817 SDValue T0 = CurDAG->getCopyFromReg(Chain, dl, Reg0, MVT::i32, in tryInlineAsm()