Lines Matching refs:TableEntry
557 const NEONLdStTableEntry *TableEntry = LookupNEONLdSt(MI.getOpcode()); in ExpandVLD() local
558 assert(TableEntry && TableEntry->IsLoad && "NEONLdStTable lookup failed"); in ExpandVLD()
559 NEONRegSpacing RegSpc = (NEONRegSpacing)TableEntry->RegSpacing; in ExpandVLD()
560 unsigned NumRegs = TableEntry->NumRegs; in ExpandVLD()
563 TII->get(TableEntry->RealOpc)); in ExpandVLD()
569 bool IsVLD2DUP = TableEntry->RealOpc == ARM::VLD2DUPd8x2 || in ExpandVLD()
570 TableEntry->RealOpc == ARM::VLD2DUPd16x2 || in ExpandVLD()
571 TableEntry->RealOpc == ARM::VLD2DUPd32x2 || in ExpandVLD()
572 TableEntry->RealOpc == ARM::VLD2DUPd8x2wb_fixed || in ExpandVLD()
573 TableEntry->RealOpc == ARM::VLD2DUPd16x2wb_fixed || in ExpandVLD()
574 TableEntry->RealOpc == ARM::VLD2DUPd32x2wb_fixed || in ExpandVLD()
575 TableEntry->RealOpc == ARM::VLD2DUPd8x2wb_register || in ExpandVLD()
576 TableEntry->RealOpc == ARM::VLD2DUPd16x2wb_register || in ExpandVLD()
577 TableEntry->RealOpc == ARM::VLD2DUPd32x2wb_register; in ExpandVLD()
595 if (NumRegs > 1 && TableEntry->copyAllListRegs) in ExpandVLD()
597 if (NumRegs > 2 && TableEntry->copyAllListRegs) in ExpandVLD()
599 if (NumRegs > 3 && TableEntry->copyAllListRegs) in ExpandVLD()
603 if (TableEntry->isUpdating) in ExpandVLD()
611 if (TableEntry->hasWritebackOperand) { in ExpandVLD()
620 if (TableEntry->RealOpc == ARM::VLD1d8Qwb_fixed || in ExpandVLD()
621 TableEntry->RealOpc == ARM::VLD1d16Qwb_fixed || in ExpandVLD()
622 TableEntry->RealOpc == ARM::VLD1d32Qwb_fixed || in ExpandVLD()
623 TableEntry->RealOpc == ARM::VLD1d64Qwb_fixed || in ExpandVLD()
624 TableEntry->RealOpc == ARM::VLD1d8Twb_fixed || in ExpandVLD()
625 TableEntry->RealOpc == ARM::VLD1d16Twb_fixed || in ExpandVLD()
626 TableEntry->RealOpc == ARM::VLD1d32Twb_fixed || in ExpandVLD()
627 TableEntry->RealOpc == ARM::VLD1d64Twb_fixed || in ExpandVLD()
628 TableEntry->RealOpc == ARM::VLD2DUPd8x2wb_fixed || in ExpandVLD()
629 TableEntry->RealOpc == ARM::VLD2DUPd16x2wb_fixed || in ExpandVLD()
630 TableEntry->RealOpc == ARM::VLD2DUPd32x2wb_fixed) { in ExpandVLD()
678 const NEONLdStTableEntry *TableEntry = LookupNEONLdSt(MI.getOpcode()); in ExpandVST() local
679 assert(TableEntry && !TableEntry->IsLoad && "NEONLdStTable lookup failed"); in ExpandVST()
680 NEONRegSpacing RegSpc = (NEONRegSpacing)TableEntry->RegSpacing; in ExpandVST()
681 unsigned NumRegs = TableEntry->NumRegs; in ExpandVST()
684 TII->get(TableEntry->RealOpc)); in ExpandVST()
686 if (TableEntry->isUpdating) in ExpandVST()
693 if (TableEntry->hasWritebackOperand) { in ExpandVST()
702 if (TableEntry->RealOpc == ARM::VST1d8Qwb_fixed || in ExpandVST()
703 TableEntry->RealOpc == ARM::VST1d16Qwb_fixed || in ExpandVST()
704 TableEntry->RealOpc == ARM::VST1d32Qwb_fixed || in ExpandVST()
705 TableEntry->RealOpc == ARM::VST1d64Qwb_fixed || in ExpandVST()
706 TableEntry->RealOpc == ARM::VST1d8Twb_fixed || in ExpandVST()
707 TableEntry->RealOpc == ARM::VST1d16Twb_fixed || in ExpandVST()
708 TableEntry->RealOpc == ARM::VST1d32Twb_fixed || in ExpandVST()
709 TableEntry->RealOpc == ARM::VST1d64Twb_fixed) { in ExpandVST()
724 if (NumRegs > 1 && TableEntry->copyAllListRegs) in ExpandVST()
726 if (NumRegs > 2 && TableEntry->copyAllListRegs) in ExpandVST()
728 if (NumRegs > 3 && TableEntry->copyAllListRegs) in ExpandVST()
754 const NEONLdStTableEntry *TableEntry = LookupNEONLdSt(MI.getOpcode()); in ExpandLaneOp() local
755 assert(TableEntry && "NEONLdStTable lookup failed"); in ExpandLaneOp()
756 NEONRegSpacing RegSpc = (NEONRegSpacing)TableEntry->RegSpacing; in ExpandLaneOp()
757 unsigned NumRegs = TableEntry->NumRegs; in ExpandLaneOp()
758 unsigned RegElts = TableEntry->RegElts; in ExpandLaneOp()
761 TII->get(TableEntry->RealOpc)); in ExpandLaneOp()
778 if (TableEntry->IsLoad) { in ExpandLaneOp()
791 if (TableEntry->isUpdating) in ExpandLaneOp()
798 if (TableEntry->hasWritebackOperand) in ExpandLaneOp()
803 if (!TableEntry->IsLoad) in ExpandLaneOp()
828 if (TableEntry->IsLoad) in ExpandLaneOp()