Lines Matching refs:MF
63 ARMBaseRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { in getCalleeSavedRegs()
64 const ARMSubtarget &STI = MF->getSubtarget<ARMSubtarget>(); in getCalleeSavedRegs()
65 bool UseSplitPush = STI.splitFramePushPop(*MF); in getCalleeSavedRegs()
66 const Function &F = MF->getFunction(); in getCalleeSavedRegs()
72 } else if (STI.splitFramePointerPush(*MF)) { in getCalleeSavedRegs()
107 return MF->getInfo<ARMFunctionInfo>()->isSplitCSR() in getCalleeSavedRegs()
122 const MachineFunction *MF) const { in getCalleeSavedRegsViaCopy()
123 assert(MF && "Invalid MachineFunction pointer."); in getCalleeSavedRegsViaCopy()
124 if (MF->getFunction().getCallingConv() == CallingConv::CXX_FAST_TLS && in getCalleeSavedRegsViaCopy()
125 MF->getInfo<ARMFunctionInfo>()->isSplitCSR()) in getCalleeSavedRegsViaCopy()
131 ARMBaseRegisterInfo::getCallPreservedMask(const MachineFunction &MF, in getCallPreservedMask() argument
133 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getCallPreservedMask()
144 MF.getFunction().getAttributes().hasAttrSomewhere(Attribute::SwiftError)) in getCallPreservedMask()
159 ARMBaseRegisterInfo::getTLSCallPreservedMask(const MachineFunction &MF) const { in getTLSCallPreservedMask()
160 assert(MF.getSubtarget<ARMSubtarget>().isTargetDarwin() && in getTLSCallPreservedMask()
166 ARMBaseRegisterInfo::getSjLjDispatchPreservedMask(const MachineFunction &MF) const { in getSjLjDispatchPreservedMask()
167 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getSjLjDispatchPreservedMask()
175 ARMBaseRegisterInfo::getThisReturnPreservedMask(const MachineFunction &MF, in getThisReturnPreservedMask() argument
177 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getThisReturnPreservedMask()
194 const MachineFunction *MF) const { in getIntraCallClobberedRegs()
200 getReservedRegs(const MachineFunction &MF) const { in getReservedRegs()
201 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getReservedRegs()
202 const ARMFrameLowering *TFI = getFrameLowering(MF); in getReservedRegs()
210 if (TFI->hasFP(MF)) in getReservedRegs()
212 if (hasBasePointer(MF)) in getReservedRegs()
236 isAsmClobberable(const MachineFunction &MF, MCRegister PhysReg) const { in isAsmClobberable() argument
237 return !getReservedRegs(MF).test(PhysReg); in isAsmClobberable()
240 bool ARMBaseRegisterInfo::isInlineAsmReadOnlyReg(const MachineFunction &MF, in isInlineAsmReadOnlyReg() argument
242 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in isInlineAsmReadOnlyReg()
243 const ARMFrameLowering *TFI = getFrameLowering(MF); in isInlineAsmReadOnlyReg()
247 if (TFI->isFPReserved(MF)) in isInlineAsmReadOnlyReg()
249 if (hasBasePointer(MF)) in isInlineAsmReadOnlyReg()
257 const MachineFunction &MF) const { in getLargestLegalSuperClass()
270 if (MF.getSubtarget<ARMSubtarget>().hasNEON()) in getLargestLegalSuperClass()
276 if (MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps()) in getLargestLegalSuperClass()
286 ARMBaseRegisterInfo::getPointerRegClass(const MachineFunction &MF, unsigned Kind) in getPointerRegClass() argument
300 MachineFunction &MF) const { in getRegPressureLimit()
301 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getRegPressureLimit()
302 const ARMFrameLowering *TFI = getFrameLowering(MF); in getRegPressureLimit()
311 bool HasFP = MF.getFrameInfo().isMaxCallFrameSizeComputed() in getRegPressureLimit()
312 ? TFI->hasFP(MF) : true; in getRegPressureLimit()
316 bool HasFP = MF.getFrameInfo().isMaxCallFrameSizeComputed() in getRegPressureLimit()
317 ? TFI->hasFP(MF) : true; in getRegPressureLimit()
338 SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, in getRegAllocationHints() argument
340 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getRegAllocationHints()
352 TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, MF, VRM); in getRegAllocationHints()
357 return TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, MF, VRM); in getRegAllocationHints()
392 MachineFunction &MF) const { in updateRegAllocHint()
393 MachineRegisterInfo *MRI = &MF.getRegInfo(); in updateRegAllocHint()
416 bool ARMBaseRegisterInfo::hasBasePointer(const MachineFunction &MF) const { in hasBasePointer()
417 const MachineFrameInfo &MFI = MF.getFrameInfo(); in hasBasePointer()
418 const ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); in hasBasePointer()
419 const ARMFrameLowering *TFI = getFrameLowering(MF); in hasBasePointer()
424 if (hasStackRealignment(MF) && !TFI->hasReservedCallFrame(MF)) in hasBasePointer()
448 if (AFI->isThumb1OnlyFunction() && !TFI->hasReservedCallFrame(MF)) in hasBasePointer()
453 bool ARMBaseRegisterInfo::canRealignStack(const MachineFunction &MF) const { in canRealignStack()
454 const MachineRegisterInfo *MRI = &MF.getRegInfo(); in canRealignStack()
455 const ARMFrameLowering *TFI = getFrameLowering(MF); in canRealignStack()
456 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in canRealignStack()
460 if (!TargetRegisterInfo::canRealignStack(MF)) in canRealignStack()
468 if (TFI->hasReservedCallFrame(MF)) in canRealignStack()
476 cannotEliminateFrame(const MachineFunction &MF) const { in cannotEliminateFrame()
477 const MachineFrameInfo &MFI = MF.getFrameInfo(); in cannotEliminateFrame()
478 if (MF.getTarget().Options.DisableFramePointerElim(MF) && MFI.adjustsStack()) in cannotEliminateFrame()
481 hasStackRealignment(MF); in cannotEliminateFrame()
485 ARMBaseRegisterInfo::getFrameRegister(const MachineFunction &MF) const { in getFrameRegister()
486 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getFrameRegister()
487 const ARMFrameLowering *TFI = getFrameLowering(MF); in getFrameRegister()
489 if (TFI->hasFP(MF)) in getFrameRegister()
500 MachineFunction &MF = *MBB.getParent(); in emitLoadConstPool() local
501 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo(); in emitLoadConstPool()
502 MachineConstantPool *ConstantPool = MF.getConstantPool(); in emitLoadConstPool()
504 ConstantInt::get(Type::getInt32Ty(MF.getFunction().getContext()), Val); in emitLoadConstPool()
516 requiresRegisterScavenging(const MachineFunction &MF) const { in requiresRegisterScavenging()
521 requiresFrameIndexScavenging(const MachineFunction &MF) const { in requiresFrameIndexScavenging()
526 requiresVirtualBaseRegisters(const MachineFunction &MF) const { in requiresVirtualBaseRegisters()
617 MachineFunction &MF = *MI->getParent()->getParent(); in needsFrameBaseReg() local
618 const ARMFrameLowering *TFI = getFrameLowering(MF); in needsFrameBaseReg()
619 MachineFrameInfo &MFI = MF.getFrameInfo(); in needsFrameBaseReg()
620 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); in needsFrameBaseReg()
644 if (TFI->hasFP(MF) && in needsFrameBaseReg()
646 canRealignStack(MF))) { in needsFrameBaseReg()
647 if (isFrameOffsetLegal(MI, getFrameRegister(MF), FPOffset)) in needsFrameBaseReg()
677 const MachineFunction &MF = *MBB->getParent(); in materializeFrameBaseRegister() local
679 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo(); in materializeFrameBaseRegister()
682 MRI.constrainRegClass(BaseReg, TII.getRegClass(MCID, 0, this, MF)); in materializeFrameBaseRegister()
696 MachineFunction &MF = *MBB.getParent(); in resolveFrameIndex() local
698 *static_cast<const ARMBaseInstrInfo *>(MF.getSubtarget().getInstrInfo()); in resolveFrameIndex()
699 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); in resolveFrameIndex()
795 MachineFunction &MF = *MBB.getParent(); in eliminateFrameIndex() local
797 *static_cast<const ARMBaseInstrInfo *>(MF.getSubtarget().getInstrInfo()); in eliminateFrameIndex()
798 const ARMFrameLowering *TFI = getFrameLowering(MF); in eliminateFrameIndex()
799 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); in eliminateFrameIndex()
805 int Offset = TFI->ResolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj); in eliminateFrameIndex()
813 assert(TFI->hasReservedCallFrame(MF) && in eliminateFrameIndex()
816 assert(!MF.getFrameInfo().hasVarSizedObjects() && in eliminateFrameIndex()
862 ScratchReg = MF.getRegInfo().createVirtualRegister(RegClass); in eliminateFrameIndex()
885 auto MF = MBB->getParent(); in shouldCoalesce() local
886 const MachineRegisterInfo &MRI = MF->getRegInfo(); in shouldCoalesce()
913 auto AFI = MF->getInfo<ARMFunctionInfo>(); in shouldCoalesce()