Lines Matching refs:DefAlign
3878 unsigned DefIdx, unsigned DefAlign) const { in getVLDMDefCycle()
3905 if ((isSLoad && (RegNo % 2)) || DefAlign < 8) in getVLDMDefCycle()
3918 unsigned DefIdx, unsigned DefAlign) const { in getLDMDefCycle()
3937 if ((RegNo % 2) || DefAlign < 8) in getLDMDefCycle()
4018 unsigned DefIdx, unsigned DefAlign, const MCInstrDesc &UseMCID, in getOperandLatency() argument
4042 DefCycle = getVLDMDefCycle(ItinData, DefMCID, DefClass, DefIdx, DefAlign); in getOperandLatency()
4063 DefCycle = getLDMDefCycle(ItinData, DefMCID, DefClass, DefIdx, DefAlign); in getOperandLatency()
4186 const MCInstrDesc &DefMCID, unsigned DefAlign) { in adjustDefLatency() argument
4246 if (DefAlign < 8 && Subtarget.checkVLDnAccessAlignment()) { in adjustDefLatency()
4430 unsigned DefAlign = DefMI.hasOneMemOperand() in getOperandLatencyImpl() local
4439 ItinData, DefMCID, DefIdx, DefAlign, UseMCID, UseIdx, UseAlign); in getOperandLatencyImpl()
4448 Adj += adjustDefLatency(Subtarget, DefMI, DefMCID, DefAlign); in getOperandLatencyImpl()
4481 unsigned DefAlign = !DefMN->memoperands_empty() in getOperandLatency() local
4489 ItinData, DefMCID, DefIdx, DefAlign, UseMCID, UseIdx, UseAlign); in getOperandLatency()
4547 if (DefAlign < 8 && Subtarget.checkVLDnAccessAlignment()) in getOperandLatency()
4776 unsigned DefAlign = in getInstrLatency() local
4778 int Adj = adjustDefLatency(Subtarget, MI, MCID, DefAlign); in getInstrLatency()