Lines Matching refs:CurReg
2579 unsigned CurReg = RegClass->getRegister(CurRegEnc); in tryFoldSPUpdateIntoPushPop() local
2586 RegList.push_back(MachineOperand::CreateReg(CurReg, false, false, in tryFoldSPUpdateIntoPushPop()
2596 if (isCalleeSavedRegister(CurReg, CSRegs) || in tryFoldSPUpdateIntoPushPop()
2597 MI->getParent()->computeRegisterLiveness(TRI, CurReg, MI) != in tryFoldSPUpdateIntoPushPop()
2608 RegList.push_back(MachineOperand::CreateReg(CurReg, true, false, false, in tryFoldSPUpdateIntoPushPop()
5282 unsigned CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain() local
5283 bool CurUndef = !MI.readsRegister(CurReg, TRI); in setExecutionDomain()
5284 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
5286 CurReg = SrcLane == 0 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain()
5287 CurUndef = !MI.readsRegister(CurReg, TRI); in setExecutionDomain()
5288 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)) in setExecutionDomain()
5300 CurReg = SrcLane == 1 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain()
5301 CurUndef = CurReg == DSrc && !MI.readsRegister(CurReg, TRI); in setExecutionDomain()
5302 MIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
5304 CurReg = SrcLane == 0 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain()
5305 CurUndef = CurReg == DSrc && !MI.readsRegister(CurReg, TRI); in setExecutionDomain()
5306 MIB.addReg(CurReg, getUndefRegState(CurUndef)) in setExecutionDomain()