36     llvm::cl::init(llvm::AMDGPU::AMDHSA_COV5),
158 namespace AMDGPU {  namespace
199     return AMDGPU::ImplicitArg::MULTIGRID_SYNC_ARG_OFFSET;  in getMultigridSyncArgImplicitArgPosition()
212     return AMDGPU::ImplicitArg::HOSTCALL_PTR_OFFSET;  in getHostcallImplicitArgPosition()
222     return AMDGPU::ImplicitArg::DEFAULT_QUEUE_OFFSET;  in getDefaultQueueImplicitArgPosition()
232     return AMDGPU::ImplicitArg::COMPLETION_ACTION_OFFSET;  in getCompletionActionImplicitArgPosition()
474   if (ST.hasFeature(AMDGPU::FeatureGFX12Insts))  in getVOPDEncodingFamily()
476   if (ST.hasFeature(AMDGPU::FeatureGFX11Insts))  in getVOPDEncodingFamily()
495   return AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::src0X);  in isVOPD()
499   return Opc == AMDGPU::V_MAC_F32_e64_gfx6_gfx7 ||  in isMAC()
500          Opc == AMDGPU::V_MAC_F32_e64_gfx10 ||  in isMAC()
501          Opc == AMDGPU::V_MAC_F32_e64_vi ||  in isMAC()
502          Opc == AMDGPU::V_MAC_LEGACY_F32_e64_gfx6_gfx7 ||  in isMAC()
503          Opc == AMDGPU::V_MAC_LEGACY_F32_e64_gfx10 ||  in isMAC()
504          Opc == AMDGPU::V_MAC_F16_e64_vi ||  in isMAC()
505          Opc == AMDGPU::V_FMAC_F64_e64_gfx90a ||  in isMAC()
506          Opc == AMDGPU::V_FMAC_F32_e64_gfx10 ||  in isMAC()
507          Opc == AMDGPU::V_FMAC_F32_e64_gfx11 ||  in isMAC()
508          Opc == AMDGPU::V_FMAC_F32_e64_gfx12 ||  in isMAC()
509          Opc == AMDGPU::V_FMAC_F32_e64_vi ||  in isMAC()
510          Opc == AMDGPU::V_FMAC_LEGACY_F32_e64_gfx10 ||  in isMAC()
511          Opc == AMDGPU::V_FMAC_DX9_ZERO_F32_e64_gfx11 ||  in isMAC()
512          Opc == AMDGPU::V_FMAC_F16_e64_gfx10 ||  in isMAC()
513          Opc == AMDGPU::V_FMAC_F16_t16_e64_gfx11 ||  in isMAC()
514          Opc == AMDGPU::V_FMAC_F16_t16_e64_gfx12 ||  in isMAC()
515          Opc == AMDGPU::V_DOT2C_F32_F16_e64_vi ||  in isMAC()
516          Opc == AMDGPU::V_DOT2C_I32_I16_e64_vi ||  in isMAC()
517          Opc == AMDGPU::V_DOT4C_I32_I8_e64_vi ||  in isMAC()
518          Opc == AMDGPU::V_DOT8C_I32_I4_e64_vi;  in isMAC()
522   return Opc == AMDGPU::V_PERMLANE16_B32_gfx10 ||  in isPermlane16()
523          Opc == AMDGPU::V_PERMLANEX16_B32_gfx10 ||  in isPermlane16()
524          Opc == AMDGPU::V_PERMLANE16_B32_e64_gfx11 ||  in isPermlane16()
525          Opc == AMDGPU::V_PERMLANEX16_B32_e64_gfx11 ||  in isPermlane16()
526          Opc == AMDGPU::V_PERMLANE16_B32_e64_gfx12 ||  in isPermlane16()
527          Opc == AMDGPU::V_PERMLANEX16_B32_e64_gfx12 ||  in isPermlane16()
528          Opc == AMDGPU::V_PERMLANE16_VAR_B32_e64_gfx12 ||  in isPermlane16()
529          Opc == AMDGPU::V_PERMLANEX16_VAR_B32_e64_gfx12;  in isPermlane16()
533   return Opc == AMDGPU::V_CVT_F32_BF8_e64_gfx12 ||  in isCvt_F32_Fp8_Bf8_e64()
534          Opc == AMDGPU::V_CVT_F32_FP8_e64_gfx12 ||  in isCvt_F32_Fp8_Bf8_e64()
535          Opc == AMDGPU::V_CVT_F32_BF8_e64_dpp_gfx12 ||  in isCvt_F32_Fp8_Bf8_e64()
536          Opc == AMDGPU::V_CVT_F32_FP8_e64_dpp_gfx12 ||  in isCvt_F32_Fp8_Bf8_e64()
537          Opc == AMDGPU::V_CVT_F32_BF8_e64_dpp8_gfx12 ||  in isCvt_F32_Fp8_Bf8_e64()
538          Opc == AMDGPU::V_CVT_F32_FP8_e64_dpp8_gfx12 ||  in isCvt_F32_Fp8_Bf8_e64()
539          Opc == AMDGPU::V_CVT_PK_F32_BF8_e64_gfx12 ||  in isCvt_F32_Fp8_Bf8_e64()
540          Opc == AMDGPU::V_CVT_PK_F32_FP8_e64_gfx12;  in isCvt_F32_Fp8_Bf8_e64()
544   return Opc == AMDGPU::G_AMDGPU_ATOMIC_FMIN ||  in isGenericAtomic()
545          Opc == AMDGPU::G_AMDGPU_ATOMIC_FMAX ||  in isGenericAtomic()
546          Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_SWAP ||  in isGenericAtomic()
547          Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_ADD ||  in isGenericAtomic()
548          Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_SUB ||  in isGenericAtomic()
549          Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_SMIN ||  in isGenericAtomic()
550          Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_UMIN ||  in isGenericAtomic()
551          Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_SMAX ||  in isGenericAtomic()
552          Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_UMAX ||  in isGenericAtomic()
553          Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_AND ||  in isGenericAtomic()
554          Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_OR ||  in isGenericAtomic()
555          Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_XOR ||  in isGenericAtomic()
556          Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_INC ||  in isGenericAtomic()
557          Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_DEC ||  in isGenericAtomic()
558          Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_FADD ||  in isGenericAtomic()
559          Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_FMIN ||  in isGenericAtomic()
560          Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_FMAX ||  in isGenericAtomic()
561          Opc == AMDGPU::G_AMDGPU_BUFFER_ATOMIC_CMPSWAP ||  in isGenericAtomic()
562          Opc == AMDGPU::G_AMDGPU_ATOMIC_CMPXCHG;  in isGenericAtomic()
619     if (OpDesc.operands()[CompOprIdx].OperandType == AMDGPU::OPERAND_KIMM32) {  in ComponentProps()
1017         STI->getFeatureBits().test(AMDGPU::FeatureArchitectedFlatScratch))  in getNumExtraSGPRs()
1027                           STI->getFeatureBits().test(AMDGPU::FeatureXNACK));  in getNumExtraSGPRs()
1205   if (AMDGPU::isGFX90A(*STI)) {  in getDefaultAmdhsaKernelDescriptor()
2085   return AMDGPU::isModuleEntryFunctionCC(Func->getCallingConv());  in isKernelCC()
2089   return STI.hasFeature(AMDGPU::FeatureXNACK);  in hasXNACK()
2093   return STI.hasFeature(AMDGPU::FeatureSRAMECC);  in hasSRAMECC()
2097   return STI.hasFeature(AMDGPU::FeatureMIMG_R128) && !STI.hasFeature(AMDGPU::FeatureR128A16);  in hasMIMG_R128()
2101   return STI.hasFeature(AMDGPU::FeatureA16);  in hasA16()
2105   return STI.hasFeature(AMDGPU::FeatureG16);  in hasG16()
2109   return !STI.hasFeature(AMDGPU::FeatureUnpackedD16VMem) && !isCI(STI) &&  in hasPackedD16()
2114   return STI.hasFeature(AMDGPU::FeatureGDS);  in hasGDS()
2131   return STI.hasFeature(AMDGPU::FeatureSouthernIslands);  in isSI()
2135   return STI.hasFeature(AMDGPU::FeatureSeaIslands);  in isCI()
2139   return STI.hasFeature(AMDGPU::FeatureVolcanicIslands);  in isVI()
2143   return STI.hasFeature(AMDGPU::FeatureGFX9);  in isGFX9()
2167   return STI.hasFeature(AMDGPU::FeatureGFX10);  in isGFX10()
2179   return STI.hasFeature(AMDGPU::FeatureGFX11);  in isGFX11()
2187   return STI.getFeatureBits()[AMDGPU::FeatureGFX12];  in isGFX12()
2203   return isGFX10(STI) && !AMDGPU::isGFX10_BEncoding(STI);  in isGFX10Before1030()
2207   return STI.hasFeature(AMDGPU::FeatureGCN3Encoding);  in isGCN3Encoding()
2211   return STI.hasFeature(AMDGPU::FeatureGFX10_AEncoding);  in isGFX10_AEncoding()
2215   return STI.hasFeature(AMDGPU::FeatureGFX10_BEncoding);  in isGFX10_BEncoding()
2219   return STI.hasFeature(AMDGPU::FeatureGFX10_3Insts);  in hasGFX10_3Insts()
2227   return STI.hasFeature(AMDGPU::FeatureGFX90AInsts);  in isGFX90A()
2231   return STI.hasFeature(AMDGPU::FeatureGFX940Insts);  in isGFX940()
2235   return STI.hasFeature(AMDGPU::FeatureArchitectedFlatScratch);  in hasArchitectedFlatScratch()
2239   return STI.hasFeature(AMDGPU::FeatureMAIInsts);  in hasMAIInsts()
2243   return STI.hasFeature(AMDGPU::FeatureVOPD);  in hasVOPD()
2247   return STI.hasFeature(AMDGPU::FeatureDPPSrc1SGPR);  in hasDPPSrc1SGPR()
2251   return STI.hasFeature(AMDGPU::FeatureKernargPreload);  in hasKernargPreload()
2262   const MCRegisterClass SGPRClass = TRI->getRegClass(AMDGPU::SReg_32RegClassID);  in isSGPR()
2263   const unsigned FirstSubReg = TRI->getSubReg(Reg, AMDGPU::sub0);  in isSGPR()
2265     Reg == AMDGPU::SCC;  in isSGPR()
2269   return MRI.getEncodingValue(Reg) & AMDGPU::HWEncoding::IS_HI;  in isHi()
2273   using namespace AMDGPU; \
2351   case AMDGPU::SRC_SHARED_BASE_LO:  in isInlineValue()
2352   case AMDGPU::SRC_SHARED_BASE:  in isInlineValue()
2353   case AMDGPU::SRC_SHARED_LIMIT_LO:  in isInlineValue()
2354   case AMDGPU::SRC_SHARED_LIMIT:  in isInlineValue()
2355   case AMDGPU::SRC_PRIVATE_BASE_LO:  in isInlineValue()
2356   case AMDGPU::SRC_PRIVATE_BASE:  in isInlineValue()
2357   case AMDGPU::SRC_PRIVATE_LIMIT_LO:  in isInlineValue()
2358   case AMDGPU::SRC_PRIVATE_LIMIT:  in isInlineValue()
2359   case AMDGPU::SRC_POPS_EXITING_WAVE_ID:  in isInlineValue()
2361   case AMDGPU::SRC_VCCZ:  in isInlineValue()
2362   case AMDGPU::SRC_EXECZ:  in isInlineValue()
2363   case AMDGPU::SRC_SCC:  in isInlineValue()
2365   case AMDGPU::SGPR_NULL:  in isInlineValue()
2381   return OpType >= AMDGPU::OPERAND_SRC_FIRST &&  in isSISrcOperand()
2382          OpType <= AMDGPU::OPERAND_SRC_LAST;  in isSISrcOperand()
2388   return OpType >= AMDGPU::OPERAND_KIMM_FIRST &&  in isKImmOperand()
2389          OpType <= AMDGPU::OPERAND_KIMM_LAST;  in isKImmOperand()
2396   case AMDGPU::OPERAND_REG_IMM_FP32:  in isSISrcFPOperand()
2397   case AMDGPU::OPERAND_REG_IMM_FP32_DEFERRED:  in isSISrcFPOperand()
2398   case AMDGPU::OPERAND_REG_IMM_FP64:  in isSISrcFPOperand()
2399   case AMDGPU::OPERAND_REG_IMM_FP16:  in isSISrcFPOperand()
2400   case AMDGPU::OPERAND_REG_IMM_FP16_DEFERRED:  in isSISrcFPOperand()
2401   case AMDGPU::OPERAND_REG_IMM_V2FP16:  in isSISrcFPOperand()
2402   case AMDGPU::OPERAND_REG_INLINE_C_FP32:  in isSISrcFPOperand()
2403   case AMDGPU::OPERAND_REG_INLINE_C_FP64:  in isSISrcFPOperand()
2404   case AMDGPU::OPERAND_REG_INLINE_C_FP16:  in isSISrcFPOperand()
2405   case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:  in isSISrcFPOperand()
2406   case AMDGPU::OPERAND_REG_INLINE_AC_FP32:  in isSISrcFPOperand()
2407   case AMDGPU::OPERAND_REG_INLINE_AC_FP16:  in isSISrcFPOperand()
2408   case AMDGPU::OPERAND_REG_INLINE_AC_V2FP16:  in isSISrcFPOperand()
2409   case AMDGPU::OPERAND_REG_IMM_V2FP32:  in isSISrcFPOperand()
2410   case AMDGPU::OPERAND_REG_INLINE_C_V2FP32:  in isSISrcFPOperand()
2411   case AMDGPU::OPERAND_REG_INLINE_AC_FP64:  in isSISrcFPOperand()
2421   return (OpType >= AMDGPU::OPERAND_REG_INLINE_C_FIRST &&  in isSISrcInlinableOperand()
2422           OpType <= AMDGPU::OPERAND_REG_INLINE_C_LAST) ||  in isSISrcInlinableOperand()
2423          (OpType >= AMDGPU::OPERAND_REG_INLINE_AC_FIRST &&  in isSISrcInlinableOperand()
2424           OpType <= AMDGPU::OPERAND_REG_INLINE_AC_LAST);  in isSISrcInlinableOperand()
2431   case AMDGPU::SGPR_LO16RegClassID:  in getRegBitWidth()
2432   case AMDGPU::AGPR_LO16RegClassID:  in getRegBitWidth()
2434   case AMDGPU::SGPR_32RegClassID:  in getRegBitWidth()
2435   case AMDGPU::VGPR_32RegClassID:  in getRegBitWidth()
2436   case AMDGPU::VRegOrLds_32RegClassID:  in getRegBitWidth()
2437   case AMDGPU::AGPR_32RegClassID:  in getRegBitWidth()
2438   case AMDGPU::VS_32RegClassID:  in getRegBitWidth()
2439   case AMDGPU::AV_32RegClassID:  in getRegBitWidth()
2440   case AMDGPU::SReg_32RegClassID:  in getRegBitWidth()
2441   case AMDGPU::SReg_32_XM0RegClassID:  in getRegBitWidth()
2442   case AMDGPU::SRegOrLds_32RegClassID:  in getRegBitWidth()
2444   case AMDGPU::SGPR_64RegClassID:  in getRegBitWidth()
2445   case AMDGPU::VS_64RegClassID:  in getRegBitWidth()
2446   case AMDGPU::SReg_64RegClassID:  in getRegBitWidth()
2447   case AMDGPU::VReg_64RegClassID:  in getRegBitWidth()
2448   case AMDGPU::AReg_64RegClassID:  in getRegBitWidth()
2449   case AMDGPU::SReg_64_XEXECRegClassID:  in getRegBitWidth()
2450   case AMDGPU::VReg_64_Align2RegClassID:  in getRegBitWidth()
2451   case AMDGPU::AReg_64_Align2RegClassID:  in getRegBitWidth()
2452   case AMDGPU::AV_64RegClassID:  in getRegBitWidth()
2453   case AMDGPU::AV_64_Align2RegClassID:  in getRegBitWidth()
2455   case AMDGPU::SGPR_96RegClassID:  in getRegBitWidth()
2456   case AMDGPU::SReg_96RegClassID:  in getRegBitWidth()
2457   case AMDGPU::VReg_96RegClassID:  in getRegBitWidth()
2458   case AMDGPU::AReg_96RegClassID:  in getRegBitWidth()
2459   case AMDGPU::VReg_96_Align2RegClassID:  in getRegBitWidth()
2460   case AMDGPU::AReg_96_Align2RegClassID:  in getRegBitWidth()
2461   case AMDGPU::AV_96RegClassID:  in getRegBitWidth()
2462   case AMDGPU::AV_96_Align2RegClassID:  in getRegBitWidth()
2464   case AMDGPU::SGPR_128RegClassID:  in getRegBitWidth()
2465   case AMDGPU::SReg_128RegClassID:  in getRegBitWidth()
2466   case AMDGPU::VReg_128RegClassID:  in getRegBitWidth()
2467   case AMDGPU::AReg_128RegClassID:  in getRegBitWidth()
2468   case AMDGPU::VReg_128_Align2RegClassID:  in getRegBitWidth()
2469   case AMDGPU::AReg_128_Align2RegClassID:  in getRegBitWidth()
2470   case AMDGPU::AV_128RegClassID:  in getRegBitWidth()
2471   case AMDGPU::AV_128_Align2RegClassID:  in getRegBitWidth()
2473   case AMDGPU::SGPR_160RegClassID:  in getRegBitWidth()
2474   case AMDGPU::SReg_160RegClassID:  in getRegBitWidth()
2475   case AMDGPU::VReg_160RegClassID:  in getRegBitWidth()
2476   case AMDGPU::AReg_160RegClassID:  in getRegBitWidth()
2477   case AMDGPU::VReg_160_Align2RegClassID:  in getRegBitWidth()
2478   case AMDGPU::AReg_160_Align2RegClassID:  in getRegBitWidth()
2479   case AMDGPU::AV_160RegClassID:  in getRegBitWidth()
2480   case AMDGPU::AV_160_Align2RegClassID:  in getRegBitWidth()
2482   case AMDGPU::SGPR_192RegClassID:  in getRegBitWidth()
2483   case AMDGPU::SReg_192RegClassID:  in getRegBitWidth()
2484   case AMDGPU::VReg_192RegClassID:  in getRegBitWidth()
2485   case AMDGPU::AReg_192RegClassID:  in getRegBitWidth()
2486   case AMDGPU::VReg_192_Align2RegClassID:  in getRegBitWidth()
2487   case AMDGPU::AReg_192_Align2RegClassID:  in getRegBitWidth()
2488   case AMDGPU::AV_192RegClassID:  in getRegBitWidth()
2489   case AMDGPU::AV_192_Align2RegClassID:  in getRegBitWidth()
2491   case AMDGPU::SGPR_224RegClassID:  in getRegBitWidth()
2492   case AMDGPU::SReg_224RegClassID:  in getRegBitWidth()
2493   case AMDGPU::VReg_224RegClassID:  in getRegBitWidth()
2494   case AMDGPU::AReg_224RegClassID:  in getRegBitWidth()
2495   case AMDGPU::VReg_224_Align2RegClassID:  in getRegBitWidth()
2496   case AMDGPU::AReg_224_Align2RegClassID:  in getRegBitWidth()
2497   case AMDGPU::AV_224RegClassID:  in getRegBitWidth()
2498   case AMDGPU::AV_224_Align2RegClassID:  in getRegBitWidth()
2500   case AMDGPU::SGPR_256RegClassID:  in getRegBitWidth()
2501   case AMDGPU::SReg_256RegClassID:  in getRegBitWidth()
2502   case AMDGPU::VReg_256RegClassID:  in getRegBitWidth()
2503   case AMDGPU::AReg_256RegClassID:  in getRegBitWidth()
2504   case AMDGPU::VReg_256_Align2RegClassID:  in getRegBitWidth()
2505   case AMDGPU::AReg_256_Align2RegClassID:  in getRegBitWidth()
2506   case AMDGPU::AV_256RegClassID:  in getRegBitWidth()
2507   case AMDGPU::AV_256_Align2RegClassID:  in getRegBitWidth()
2509   case AMDGPU::SGPR_288RegClassID:  in getRegBitWidth()
2510   case AMDGPU::SReg_288RegClassID:  in getRegBitWidth()
2511   case AMDGPU::VReg_288RegClassID:  in getRegBitWidth()
2512   case AMDGPU::AReg_288RegClassID:  in getRegBitWidth()
2513   case AMDGPU::VReg_288_Align2RegClassID:  in getRegBitWidth()
2514   case AMDGPU::AReg_288_Align2RegClassID:  in getRegBitWidth()
2515   case AMDGPU::AV_288RegClassID:  in getRegBitWidth()
2516   case AMDGPU::AV_288_Align2RegClassID:  in getRegBitWidth()
2518   case AMDGPU::SGPR_320RegClassID:  in getRegBitWidth()
2519   case AMDGPU::SReg_320RegClassID:  in getRegBitWidth()
2520   case AMDGPU::VReg_320RegClassID:  in getRegBitWidth()
2521   case AMDGPU::AReg_320RegClassID:  in getRegBitWidth()
2522   case AMDGPU::VReg_320_Align2RegClassID:  in getRegBitWidth()
2523   case AMDGPU::AReg_320_Align2RegClassID:  in getRegBitWidth()
2524   case AMDGPU::AV_320RegClassID:  in getRegBitWidth()
2525   case AMDGPU::AV_320_Align2RegClassID:  in getRegBitWidth()
2527   case AMDGPU::SGPR_352RegClassID:  in getRegBitWidth()
2528   case AMDGPU::SReg_352RegClassID:  in getRegBitWidth()
2529   case AMDGPU::VReg_352RegClassID:  in getRegBitWidth()
2530   case AMDGPU::AReg_352RegClassID:  in getRegBitWidth()
2531   case AMDGPU::VReg_352_Align2RegClassID:  in getRegBitWidth()
2532   case AMDGPU::AReg_352_Align2RegClassID:  in getRegBitWidth()
2533   case AMDGPU::AV_352RegClassID:  in getRegBitWidth()
2534   case AMDGPU::AV_352_Align2RegClassID:  in getRegBitWidth()
2536   case AMDGPU::SGPR_384RegClassID:  in getRegBitWidth()
2537   case AMDGPU::SReg_384RegClassID:  in getRegBitWidth()
2538   case AMDGPU::VReg_384RegClassID:  in getRegBitWidth()
2539   case AMDGPU::AReg_384RegClassID:  in getRegBitWidth()
2540   case AMDGPU::VReg_384_Align2RegClassID:  in getRegBitWidth()
2541   case AMDGPU::AReg_384_Align2RegClassID:  in getRegBitWidth()
2542   case AMDGPU::AV_384RegClassID:  in getRegBitWidth()
2543   case AMDGPU::AV_384_Align2RegClassID:  in getRegBitWidth()
2545   case AMDGPU::SGPR_512RegClassID:  in getRegBitWidth()
2546   case AMDGPU::SReg_512RegClassID:  in getRegBitWidth()
2547   case AMDGPU::VReg_512RegClassID:  in getRegBitWidth()
2548   case AMDGPU::AReg_512RegClassID:  in getRegBitWidth()
2549   case AMDGPU::VReg_512_Align2RegClassID:  in getRegBitWidth()
2550   case AMDGPU::AReg_512_Align2RegClassID:  in getRegBitWidth()
2551   case AMDGPU::AV_512RegClassID:  in getRegBitWidth()
2552   case AMDGPU::AV_512_Align2RegClassID:  in getRegBitWidth()
2554   case AMDGPU::SGPR_1024RegClassID:  in getRegBitWidth()
2555   case AMDGPU::SReg_1024RegClassID:  in getRegBitWidth()
2556   case AMDGPU::VReg_1024RegClassID:  in getRegBitWidth()
2557   case AMDGPU::AReg_1024RegClassID:  in getRegBitWidth()
2558   case AMDGPU::VReg_1024_Align2RegClassID:  in getRegBitWidth()
2559   case AMDGPU::AReg_1024_Align2RegClassID:  in getRegBitWidth()
2560   case AMDGPU::AV_1024RegClassID:  in getRegBitWidth()
2561   case AMDGPU::AV_1024_Align2RegClassID:  in getRegBitWidth()
2709   case AMDGPU::OPERAND_REG_IMM_V2INT16:  in isInlinableLiteralV216()
2710   case AMDGPU::OPERAND_REG_INLINE_C_V2INT16:  in isInlinableLiteralV216()
2711   case AMDGPU::OPERAND_REG_INLINE_AC_V2INT16:  in isInlinableLiteralV216()
2713   case AMDGPU::OPERAND_REG_IMM_V2FP16:  in isInlinableLiteralV216()
2714   case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:  in isInlinableLiteralV216()
2715   case AMDGPU::OPERAND_REG_INLINE_AC_V2FP16:  in isInlinableLiteralV216()
2868   if (AMDGPU::isGFX10(ST))  in getNumFlatOffsetBits()
2871   if (AMDGPU::isGFX12(ST))  in getNumFlatOffsetBits()
2932     if (OpDesc.operands()[Idx].RegClass == AMDGPU::VReg_64RegClassID ||  in hasAny64BitVGPROperands()
2933         OpDesc.operands()[Idx].RegClass == AMDGPU::VReg_64_Align2RegClassID)  in hasAny64BitVGPROperands()
2947                         const AMDGPU::IsaInfo::TargetIDSetting S) {  in operator <<()
2949   case (AMDGPU::IsaInfo::TargetIDSetting::Unsupported):  in operator <<()
2952   case (AMDGPU::IsaInfo::TargetIDSetting::Any):  in operator <<()
2955   case (AMDGPU::IsaInfo::TargetIDSetting::Off):  in operator <<()
2958   case (AMDGPU::IsaInfo::TargetIDSetting::On):  in operator <<()