Lines Matching refs:OutNeeds
130 char OutNeeds = 0; member
136 char OutNeeds = 0; member
277 << ", OutNeeds = " << PrintState(BII.second.OutNeeds) << "\n\n"; in printInfo()
285 << ", OutNeeds = " << PrintState(III->second.OutNeeds) << '\n'; in printInfo()
645 if ((II.OutNeeds & StateWQM) && !(II.Disabled & StateWQM) && in propagateInstruction()
662 char InNeeds = (II.Needs & ~StateStrict) | II.OutNeeds; in propagateInstruction()
665 if ((PrevII.OutNeeds | InNeeds) != PrevII.OutNeeds) { in propagateInstruction()
666 PrevII.OutNeeds |= InNeeds; in propagateInstruction()
694 if ((LastII.OutNeeds | BI.OutNeeds) != LastII.OutNeeds) { in propagateBlock()
695 LastII.OutNeeds |= BI.OutNeeds; in propagateBlock()
703 if ((PredBI.OutNeeds | BI.InNeeds) == PredBI.OutNeeds) in propagateBlock()
706 PredBI.OutNeeds |= BI.InNeeds; in propagateBlock()
714 if ((SuccBI.InNeeds | BI.OutNeeds) == SuccBI.InNeeds) in propagateBlock()
717 SuccBI.InNeeds |= BI.OutNeeds; in propagateBlock()
1305 if (!IsEntry && BI.Needs == StateWQM && BI.OutNeeds != StateExact) { in processBlock()
1344 char OutNeeds = 0; in processBlock() local
1368 OutNeeds = III->second.OutNeeds; in processBlock()
1377 if (MI.isBranch() && OutNeeds == StateExact) in processBlock()
1383 if (BI.OutNeeds & StateWQM) in processBlock()
1385 else if (BI.OutNeeds == StateExact) in processBlock()
1446 if (!WQMFromExec && (OutNeeds & StateWQM)) { in processBlock()