Lines Matching refs:Needs
128 char Needs = 0; member
134 char Needs = 0; member
276 << ", Needs = " << PrintState(BII.second.Needs) in printInfo()
284 dbgs() << " " << MI << " Needs = " << PrintState(III->second.Needs) in printInfo()
305 if ((II.Needs & Flag) == Flag) in markInstruction()
309 II.Needs |= Flag; in markInstruction()
546 BBI.Needs |= StateExact; in scanInstructions()
562 II.Needs |= StateStrictWQM; in scanInstructions()
579 BBI.Needs |= StateExact; in scanInstructions()
647 Instructions[&MI].Needs = StateWQM; in propagateInstruction()
648 II.Needs = StateWQM; in propagateInstruction()
652 if (II.Needs & StateWQM) { in propagateInstruction()
653 BI.Needs |= StateWQM; in propagateInstruction()
662 char InNeeds = (II.Needs & ~StateStrict) | II.OutNeeds; in propagateInstruction()
673 assert(!(II.Needs & StateExact)); in propagateInstruction()
675 if (II.Needs != 0) in propagateInstruction()
676 markInstructionUses(MI, II.Needs, Worklist); in propagateInstruction()
680 if (II.Needs & StateStrictWWM) in propagateInstruction()
681 BI.Needs |= StateStrictWWM; in propagateInstruction()
682 if (II.Needs & StateStrictWQM) in propagateInstruction()
683 BI.Needs |= StateStrictWQM; in propagateInstruction()
1305 if (!IsEntry && BI.Needs == StateWQM && BI.OutNeeds != StateExact) { in processBlock()
1343 char Needs = StateExact | StateWQM; // Strict mode is disabled by default. in processBlock() local
1360 if (III->second.Needs & StateStrictWWM) in processBlock()
1361 Needs = StateStrictWWM; in processBlock()
1362 else if (III->second.Needs & StateStrictWQM) in processBlock()
1363 Needs = StateStrictWQM; in processBlock()
1364 else if (III->second.Needs & StateWQM) in processBlock()
1365 Needs = StateWQM; in processBlock()
1367 Needs &= ~III->second.Disabled; in processBlock()
1373 Needs = StateExact | StateWQM | StateStrict; in processBlock()
1378 Needs = StateExact; in processBlock()
1384 Needs = StateWQM; in processBlock()
1386 Needs = StateExact; in processBlock()
1388 Needs = StateWQM | StateExact; in processBlock()
1392 if (!(Needs & State)) { in processBlock()
1394 if (State == StateStrictWWM || Needs == StateStrictWWM || in processBlock()
1395 State == StateStrictWQM || Needs == StateStrictWQM) { in processBlock()
1412 SaveSCC = (Needs & StateStrict) || ((Needs & StateWQM) && WQMFromExec); in processBlock()
1416 SaveSCC = !(Needs & StateWQM); in processBlock()
1423 prepareInsertion(MBB, First, II, Needs == StateWQM, SaveSCC); in processBlock()
1435 if (Needs & StateStrict) { in processBlock()
1437 assert(Needs == StateStrictWWM || Needs == StateStrictWQM); in processBlock()
1441 toStrictMode(MBB, Before, SavedNonStrictReg, Needs); in processBlock()
1442 State = Needs; in processBlock()
1445 if (State == StateWQM && (Needs & StateExact) && !(Needs & StateWQM)) { in processBlock()
1453 } else if (State == StateExact && (Needs & StateWQM) && in processBlock()
1454 !(Needs & StateExact)) { in processBlock()
1468 assert(Needs & State); in processBlock()
1473 if (Needs != (StateExact | StateWQM | StateStrict)) { in processBlock()
1474 if (Needs != (StateExact | StateWQM)) in processBlock()