Lines Matching refs:SubReg
56 Register Reg, unsigned SubReg) const;
58 unsigned SubReg) const;
60 unsigned SubReg) const;
561 unsigned SubReg) const { in instAccessReg()
570 LaneBitmask Overlap = TRI->getSubRegIndexLaneMask(SubReg) & in instAccessReg()
580 unsigned SubReg) const { in instReadsReg()
581 return instAccessReg(MI->uses(), Reg, SubReg); in instReadsReg()
585 unsigned SubReg) const { in instModifiesReg()
586 return instAccessReg(MI->defs(), Reg, SubReg); in instModifiesReg()
722 .addDef(X1.Reg, 0, X1.SubReg) in matchSwap()
723 .addDef(Y1.Reg, 0, Y1.SubReg) in matchSwap()
724 .addReg(Y1.Reg, 0, Y1.SubReg) in matchSwap()
725 .addReg(X1.Reg, 0, X1.SubReg).getInstr(); in matchSwap()