400   MachineOperand &Src2 = *TII->getNamedOperand(MI, AMDGPU::OpName::src2);  in shrinkMadFma()  local
406   if (Src2.isImm() && !TII->isInlineConstant(Src2)) {  in shrinkMadFma()
435   if (Src2.isReg() && TRI->isVGPR(*MRI, Src2.getReg())) {  in shrinkMadFma()
475         .add(Src2)  in shrinkMadFma()
953         const MachineOperand *Src2 =  in runOnMachineFunction()  local
955         if (!Src2->isReg())  in runOnMachineFunction()
957         Register SReg = Src2->getReg();  in runOnMachineFunction()
981         const MachineOperand *Src2 = TII->getNamedOperand(MI,  in runOnMachineFunction()  local
983         if (Src2 && Src2->getReg() != VCCReg) {  in runOnMachineFunction()
984           if (Src2->getReg().isVirtual())  in runOnMachineFunction()
985             MRI->setRegAllocationHint(Src2->getReg(), 0, VCCReg);  in runOnMachineFunction()