Lines Matching refs:FIOp
886 MachineOperand *FIOp = in resolveFrameIndex() local
893 assert(FIOp && FIOp->isFI() && "frame index must be address operand"); in resolveFrameIndex()
900 FIOp->ChangeToRegister(BaseReg, false); in resolveFrameIndex()
912 FIOp->ChangeToRegister(BaseReg, false); in resolveFrameIndex()
2078 MachineOperand &FIOp = MI->getOperand(FIOperandNum); in eliminateFrameIndex() local
2274 FIOp.ChangeToRegister(FrameReg, false); in eliminateFrameIndex()
2330 FIOp.ChangeToImmediate(Offset); in eliminateFrameIndex()
2331 if (TII->isImmOperandLegal(*MI, FIOperandNum, FIOp)) in eliminateFrameIndex()
2337 FIOp.ChangeToRegister(AMDGPU::M0, false); in eliminateFrameIndex()
2338 bool UseSGPR = TII->isOperandLegal(*MI, FIOperandNum, &FIOp); in eliminateFrameIndex()
2341 FIOp.setReg(FrameReg); in eliminateFrameIndex()
2350 FIOp.setReg(TmpReg); in eliminateFrameIndex()
2351 FIOp.setIsKill(); in eliminateFrameIndex()
2380 FIOp.setReg(FrameReg); in eliminateFrameIndex()
2381 FIOp.setIsKill(false); in eliminateFrameIndex()
2550 FIOp.ChangeToRegister(ResultReg, false, false, true); in eliminateFrameIndex()
2581 FIOp.ChangeToImmediate(Offset); in eliminateFrameIndex()
2582 if (!TII->isImmOperandLegal(*MI, FIOperandNum, FIOp)) { in eliminateFrameIndex()
2587 FIOp.ChangeToRegister(TmpReg, false, false, true); in eliminateFrameIndex()