Lines Matching refs:STORE
45 STORE = 1u << 1, enumerator
46 LLVM_MARK_AS_BITMASK_ENUM(/* LargestFlag = */ STORE)
967 assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE); in enableVolatileAndOrNonTemporal()
1148 return insertWait(MI, Scope, AddrSpace, SIMemOp::LOAD | SIMemOp::STORE, in insertRelease()
1320 assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE); in enableVolatileAndOrNonTemporal()
1622 assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE); in enableVolatileAndOrNonTemporal()
1793 Changed |= insertWait(MI, Scope, AddrSpace, SIMemOp::LOAD | SIMemOp::STORE, in insertRelease()
1855 assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE); in enableVolatileAndOrNonTemporal()
1883 if (Op == SIMemOp::STORE) in enableVolatileAndOrNonTemporal()
1918 if ((Op & SIMemOp::STORE) != SIMemOp::NONE) in insertWait()
1930 if ((Op & SIMemOp::STORE) != SIMemOp::NONE) in insertWait()
2123 assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE); in enableVolatileAndOrNonTemporal()
2152 if (Op == SIMemOp::STORE) in enableVolatileAndOrNonTemporal()
2218 if ((Op & SIMemOp::STORE) != SIMemOp::NONE) in insertWait()
2230 if ((Op & SIMemOp::STORE) != SIMemOp::NONE) in insertWait()
2357 assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE); in enableVolatileAndOrNonTemporal()
2409 SIMemOp::LOAD | SIMemOp::STORE, in expandLoad()
2465 MI, MOI.getInstrAddrSpace(), SIMemOp::STORE, MOI.isVolatile(), in expandStore()
2480 SIMemOp::LOAD | SIMemOp::STORE, in expandAtomicFence()
2550 SIMemOp::STORE, in expandAtomicCmpxchgOrRmw()