46   const GCNSubtarget &ST = *static_cast<const GCNSubtarget *>(STI);  in SIMachineFunctionInfo()  local
47   FlatWorkGroupSizes = ST.getFlatWorkGroupSizes(F);  in SIMachineFunctionInfo()
48   WavesPerEU = ST.getWavesPerEU(F);  in SIMachineFunctionInfo()
50   Occupancy = ST.computeOccupancy(F, getLDSSize());  in SIMachineFunctionInfo()
65   MayNeedAGPRs = ST.hasMAIInsts();  in SIMachineFunctionInfo()
88     if (!ST.enableFlatScratch()) {  in SIMachineFunctionInfo()
101     MaxKernArgAlign = std::max(ST.getAlignmentForImplicitArgPtr(),  in SIMachineFunctionInfo()
104     if (ST.hasGFX90AInsts() &&  in SIMachineFunctionInfo()
105         ST.getMaxNumVGPRs(F) <= AMDGPU::VGPR_32RegClass.getNumRegs() &&  in SIMachineFunctionInfo()
111       (CC == CallingConv::AMDGPU_CS && ST.hasArchitectedSGPRs())) {  in SIMachineFunctionInfo()
127         ST.getMaxWorkitemID(F, 1) != 0)  in SIMachineFunctionInfo()
131         ST.getMaxWorkitemID(F, 2) != 0)  in SIMachineFunctionInfo()
144     if (!ST.flatScratchIsArchitected()) {  in SIMachineFunctionInfo()
148       if (ST.getGeneration() >= AMDGPUSubtarget::GFX9 &&  in SIMachineFunctionInfo()
168   if (ST.hasMAIInsts() && !ST.hasGFX90AInsts()) {  in SIMachineFunctionInfo()
170         AMDGPU::VGPR_32RegClass.getRegister(ST.getMaxNumVGPRs(F) - 1);  in SIMachineFunctionInfo()
183   const GCNSubtarget& ST = MF.getSubtarget<GCNSubtarget>();  in limitOccupancy()  local
184   limitOccupancy(ST.getOccupancyWithLocalMemSize(getLDSSize(),  in limitOccupancy()
360   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in allocatePhysicalVGPRForSGPRSpills()  local
361   const SIRegisterInfo *TRI = ST.getRegisterInfo();  in allocatePhysicalVGPRForSGPRSpills()
404   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in allocateSGPRSpillToVGPRLane()  local
406   unsigned WaveSize = ST.getWavefrontSize();  in allocateSGPRSpillToVGPRLane()
415   assert(ST.getRegisterInfo()->spillSGPRToVGPR() &&  in allocateSGPRSpillToVGPRLane()
445   const GCNSubtarget &ST =  MF.getSubtarget<GCNSubtarget>();  in allocateVGPRSpillToAGPR()  local
447   assert(ST.hasMAIInsts() && FrameInfo.isSpillSlotObjectIndex(FI));  in allocateVGPRSpillToAGPR()
464   const SIRegisterInfo *TRI = ST.getRegisterInfo();  in allocateVGPRSpillToAGPR()
587   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in getGITPtrLoReg()  local
588   if (!ST.isAmdPalOS())  in getGITPtrLoReg()
591   if (ST.hasMergedShaders()) {  in getGITPtrLoReg()