2130     Register DstHi = RI.getSubReg(Dst, AMDGPU::sub1);  in expandPostRAPseudo()
2183           .addReg(RI.getSubReg(SrcOp.getReg(), AMDGPU::sub1))  in expandPostRAPseudo()
2205     Register DstHi = RI.getSubReg(Dst, AMDGPU::sub1);  in expandPostRAPseudo()
2395     Register RegHi = RI.getSubReg(Reg, AMDGPU::sub1);  in expandPostRAPseudo()
2497       Register DstHi = RI.getSubReg(Dst, AMDGPU::sub1);  in expandPostRAPseudo()
2614   for (auto Sub : { AMDGPU::sub0, AMDGPU::sub1 }) {  in expandMovDPP64()
2653       .addImm(AMDGPU::sub1);  in expandMovDPP64()
2867       .addReg(PCReg, RegState::Define, AMDGPU::sub1)  in insertIndirectBranch()
2868       .addReg(PCReg, 0, AMDGPU::sub1)  in insertIndirectBranch()
3254     AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, AMDGPU::sub3,  in insertSelect()
3385     case AMDGPU::sub1:  in FoldImmediate()
5560     if (SubIdx == AMDGPU::sub1)  in buildExtractSubRegOrImm()
6225             .addImm(AMDGPU::sub1);  in emitLoadScalarOpsFromVGPRLoop()
6712         .addReg(RsrcPtr, 0, AMDGPU::sub1)  in legalizeOperands()
6713         .addReg(VAddr->getReg(), 0, AMDGPU::sub1)  in legalizeOperands()
6722           .addImm(AMDGPU::sub1);  in legalizeOperands()
6790           .addReg(RsrcPtr, 0, AMDGPU::sub1)  in legalizeOperands()
6791           .addImm(AMDGPU::sub1);  in legalizeOperands()
7684                                                        AMDGPU::sub1, Src0SubRC);  in splitScalar64BitUnaryOp()
7697     .addImm(AMDGPU::sub1);  in splitScalar64BitUnaryOp()
7747       buildExtractSubRegOrImm(MII, MRI, Src0, Src0RC, AMDGPU::sub1, Src0SubRC);  in splitScalarSMulU64()
7749       buildExtractSubRegOrImm(MII, MRI, Src1, Src1RC, AMDGPU::sub1, Src1SubRC);  in splitScalarSMulU64()
7803       .addImm(AMDGPU::sub1);  in splitScalarSMulU64()
7872       .addImm(AMDGPU::sub1);  in splitScalarSMulPseudo()
7917                                                        AMDGPU::sub1, Src0SubRC);  in splitScalar64BitBinaryOp()
7919                                                        AMDGPU::sub1, Src1SubRC);  in splitScalar64BitBinaryOp()
7941     .addImm(AMDGPU::sub1);  in splitScalar64BitBinaryOp()
8019                                                       AMDGPU::sub1, SrcSubRC);  in splitScalar64BitBCNT()
8068       .addImm(AMDGPU::sub1);  in splitScalar64BitBFE()
8087     .addImm(AMDGPU::sub1);  in splitScalar64BitBFE()
8123       buildExtractSubRegOrImm(MII, MRI, Src, SrcRC, AMDGPU::sub1, SrcSubRC);  in splitScalar64BitCountOp()
9817       .addImm(AMDGPU::sub1);  in enforceOperandRCAlignment()