1254       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_CSELECT_B32  in insertVectorSelect()
1268       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_CSELECT_B32  in insertVectorSelect()
1311       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_OR_SAVEEXEC_B32  in insertVectorSelect()
1314       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_CSELECT_B32  in insertVectorSelect()
1329       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_OR_SAVEEXEC_B32  in insertVectorSelect()
1332       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_CSELECT_B32  in insertVectorSelect()
2219     unsigned NotOpc = ST.isWave32() ? AMDGPU::S_NOT_B32 : AMDGPU::S_NOT_B64;  in expandPostRAPseudo()
2220     unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;  in expandPostRAPseudo()
2235     unsigned NotOpc = ST.isWave32() ? AMDGPU::S_NOT_B32 : AMDGPU::S_NOT_B64;  in expandPostRAPseudo()
2236     unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;  in expandPostRAPseudo()
2441     MI.setDesc(get(ST.isWave32() ? AMDGPU::S_OR_SAVEEXEC_B32  in expandPostRAPseudo()
2448     const unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;  in expandPostRAPseudo()
2449     const unsigned WQMOp = ST.isWave32() ? AMDGPU::S_WQM_B32 : AMDGPU::S_WQM_B64;  in expandPostRAPseudo()
2450     const unsigned MovOp = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;  in expandPostRAPseudo()
2461     MI.setDesc(get(ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64));  in expandPostRAPseudo()
5383   bool IsWave32 = ST.isWave32();  in insertScratchExecCopy()
5412   unsigned ExecMov = isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;  in restoreExec()
5413   MCRegister Exec = isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;  in restoreExec()
6153   unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;  in emitLoadScalarOpsFromVGPRLoop()
6155       ST.isWave32() ? AMDGPU::S_AND_SAVEEXEC_B32 : AMDGPU::S_AND_SAVEEXEC_B64;  in emitLoadScalarOpsFromVGPRLoop()
6157       ST.isWave32() ? AMDGPU::S_XOR_B32_term : AMDGPU::S_XOR_B64_term;  in emitLoadScalarOpsFromVGPRLoop()
6159       ST.isWave32() ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64;  in emitLoadScalarOpsFromVGPRLoop()
6306   unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;  in loadMBUFScalarOperandsFromVGPR()
6307   unsigned MovExecOpc = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;  in loadMBUFScalarOperandsFromVGPR()
7018     Register EXEC = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;  in moveToVALUImpl()
7019     unsigned Opc = ST.isWave32() ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64;  in moveToVALUImpl()
8892   if (!ST.isWave32())  in fixImplicitOperands()
9361                    get(ST.isWave32() ? AMDGPU::S_MOV_B32_term  in createPHISourceCopy()
9371 bool llvm::SIInstrInfo::isWave32() const { return ST.isWave32(); }  in isWave32()  function in llvm::SIInstrInfo