204         RI.isSGPRClass(MRI.getRegClass(Op.getReg()))) {  in isSafeToSink()
1029   if (RC == RI.getVGPR64Class() && (SrcRC == RC || RI.isSGPRClass(SrcRC))) {  in copyPhysReg()
1052   if (RI.isSGPRClass(RC)) {  in copyPhysReg()
1053     if (!RI.isSGPRClass(SrcRC)) {  in copyPhysReg()
1069              (ST.hasGFX90AInsts() && RI.isSGPRClass(SrcRC)))  in copyPhysReg()
1077               (SrcRC == RC || RI.isSGPRClass(SrcRC)))) {  in copyPhysReg()
1202   if (RI.isSGPRClass(RegClass)) {  in materializeImmediate()
1386     return RI.isSGPRClass(DstRC) ? AMDGPU::COPY : AMDGPU::V_MOV_B16_t16_e64;  in getMovOpcode()
1388     return RI.isSGPRClass(DstRC) ? AMDGPU::S_MOV_B32 : AMDGPU::V_MOV_B32_e32;  in getMovOpcode()
1389   } else if (RI.getRegSizeInBits(*DstRC) == 64 && RI.isSGPRClass(DstRC)) {  in getMovOpcode()
1391   } else if (RI.getRegSizeInBits(*DstRC) == 64 && !RI.isSGPRClass(DstRC)) {  in getMovOpcode()
1735   if (RI.isSGPRClass(RC)) {  in storeRegToStackSlot()
1962   if (RI.isSGPRClass(RC)) {  in loadRegFromStackSlot()
3205     return RI.isSGPRClass(RC);  in canInsertSelect()
3482       if (RI.isSGPRClass(MRI->getRegClass(RegSrc->getReg())) &&  in FoldImmediate()
3486       if (!Src2->isReg() || RI.isSGPRClass(MRI->getRegClass(Src2->getReg())))  in FoldImmediate()
4429     return RI.isSGPRClass(MRI.getRegClass(MO.getReg()));  in usesConstantBus()
5514   else if (RI.isSGPRClass(RC))  in legalizeOpWithMove()
5866     if (Src1.isReg() && !RI.isSGPRClass(MRI.getRegClass(Src1.getReg()))) {  in legalizeOperandsVOP3()
5872     if (Src2.isReg() && !RI.isSGPRClass(MRI.getRegClass(Src2.getReg()))) {  in legalizeOperandsVOP3()
5917     if (!RI.isSGPRClass(RI.getRegClassForReg(MRI, MO.getReg())))  in legalizeOperandsVOP3()
5991   if (SBase && !RI.isSGPRClass(MRI.getRegClass(SBase->getReg()))) {  in legalizeOperandsSMRD()
5996   if (SOff && !RI.isSGPRClass(MRI.getRegClass(SOff->getReg()))) {  in legalizeOperandsSMRD()
6091   if (!SAddr || RI.isSGPRClass(MRI.getRegClass(SAddr->getReg())))  in legalizeOperandsFLAT()
6138   if (!RI.isSGPRClass(DstRC) && !Copy->readsRegister(AMDGPU::EXEC, &RI) &&  in legalizeGenericOperand()
6483     if (VRC || !RI.isSGPRClass(getOpRegClass(MI, 0))) {  in legalizeOperands()
6591     if (SRsrc && !RI.isSGPRClass(MRI.getRegClass(SRsrc->getReg())))  in legalizeOperands()
6596     if (SSamp && !RI.isSGPRClass(MRI.getRegClass(SSamp->getReg())))  in legalizeOperands()
6605     if (!RI.isSGPRClass(MRI.getRegClass(Dest->getReg()))) {  in legalizeOperands()
6650         !RI.isSGPRClass(MRI.getRegClass(Soffset->getReg()))) {  in legalizeOperands()
6660     if (Rsrc->isReg() && !RI.isSGPRClass(MRI.getRegClass(Rsrc->getReg()))) {  in legalizeOperands()
7557                       RI.isSGPRClass(MRI.getRegClass(Src0.getReg()));  in lowerScalarXnor()
7559                       RI.isSGPRClass(MRI.getRegClass(Src1.getReg()));  in lowerScalarXnor()
7733   if (RI.isSGPRClass(Src0SubRC))  in splitScalarSMulU64()
7737   if (RI.isSGPRClass(Src1SubRC))  in splitScalarSMulU64()
7842   if (RI.isSGPRClass(Src0SubRC))  in splitScalarSMulPseudo()
7846   if (RI.isSGPRClass(Src1SubRC))  in splitScalarSMulPseudo()
8402     bool IsRequiredSGPR = RI.isSGPRClass(OpRC);  in findUsedSGPR()
8409     if (RI.isSGPRClass(RegRC))  in findUsedSGPR()
8809     IsNullOrVectorRegister = !RI.isSGPRClass(RI.getRegClassForReg(MRI, Reg));  in isBasicBlockPrologue()
9493       return RI.isSGPRClass(regClass) ? InstructionUniformity::AlwaysUniform  in getInstructionUniformity()