7112     MachineInstr *NewInstr = BuildMI(*MBB, &Inst, DL, get(Opc), DestReg)  in moveToVALUImpl()  local
7118     legalizeOperands(*NewInstr, MDT);  in moveToVALUImpl()
7120     addUsersToMoveToVALUWorklist(NewInstr->getOperand(0).getReg(), MRI,  in moveToVALUImpl()
7174     auto NewInstr =  in moveToVALUImpl()  local
7179       NewInstr  in moveToVALUImpl()
7186       NewInstr  in moveToVALUImpl()
7190     legalizeOperands(*NewInstr, MDT);  in moveToVALUImpl()
7221     MachineInstr *NewInstr = BuildMI(*MBB, Inst, DL, get(NewOpcode), NewDst)  in moveToVALUImpl()  local
7230     legalizeOperands(*NewInstr, MDT);  in moveToVALUImpl()
7289   auto NewInstr = BuildMI(*MBB, Inst, Inst.getDebugLoc(), get(NewOpcode))  in moveToVALUImpl()  local
7293     NewInstr->addOperand(Inst.getOperand(0));  in moveToVALUImpl()
7296       NewInstr.addImm(0);  in moveToVALUImpl()
7301         NewInstr.addReg(Src.getReg(), 0, AMDGPU::lo16);  in moveToVALUImpl()
7303         NewInstr->addOperand(Src);  in moveToVALUImpl()
7310       NewInstr.addImm(0);  in moveToVALUImpl()
7311       NewInstr.addImm(Size);  in moveToVALUImpl()
7315       NewInstr.addImm(0);  in moveToVALUImpl()
7326       NewInstr.addImm(Offset);  in moveToVALUImpl()
7327       NewInstr.addImm(BitWidth);  in moveToVALUImpl()
7331         NewInstr.addImm(0);  in moveToVALUImpl()
7333         NewInstr->addOperand(Inst.getOperand(2));  in moveToVALUImpl()
7336         NewInstr.addImm(0);  in moveToVALUImpl()
7338         NewInstr->addOperand(Inst.getOperand(3));  in moveToVALUImpl()
7340         NewInstr.addImm(0);  in moveToVALUImpl()
7342         NewInstr.addImm(0);  in moveToVALUImpl()
7344         NewInstr.addImm(0);  in moveToVALUImpl()
7349       NewInstr->addOperand(Op);  in moveToVALUImpl()
7361         addSCCDefsToVALUWorklist(NewInstr, Worklist);  in moveToVALUImpl()
7366   if (NewInstr->getOperand(0).isReg() && NewInstr->getOperand(0).isDef()) {  in moveToVALUImpl()
7367     Register DstReg = NewInstr->getOperand(0).getReg();  in moveToVALUImpl()
7370     const TargetRegisterClass *NewDstRC = getDestEquivalentVGPRClass(*NewInstr);  in moveToVALUImpl()
7375   fixImplicitOperands(*NewInstr);  in moveToVALUImpl()
7377   legalizeOperands(*NewInstr, MDT);  in moveToVALUImpl()