Lines Matching refs:BaseOps
362 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
383 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
419 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
439 BaseOps.push_back(RSrc); in getMemOperandsWithOffsetWidth()
442 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
450 BaseOps.push_back(SOffset); in getMemOperandsWithOffsetWidth()
466 BaseOps.push_back(&LdSt.getOperand(SRsrcIdx)); in getMemOperandsWithOffsetWidth()
471 BaseOps.push_back(&LdSt.getOperand(I)); in getMemOperandsWithOffsetWidth()
473 BaseOps.push_back(getNamedOperand(LdSt, AMDGPU::OpName::vaddr)); in getMemOperandsWithOffsetWidth()
486 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
501 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
504 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()