Lines Matching refs:createRegister
2081 ArgDescriptor::createRegister(AMDGPU::TTMP9); in getPreloadedValue()
2085 const ArgDescriptor WorkGroupIDY = ArgDescriptor::createRegister( in getPreloadedValue()
2089 ArgDescriptor::createRegister(AMDGPU::TTMP7, 0xFFFF0000u); in getPreloadedValue()
2193 Info.setWorkItemIDX(ArgDescriptor::createRegister(Reg, Mask)); in allocateSpecialEntryInputVGPRs()
2199 Info.setWorkItemIDY(ArgDescriptor::createRegister(AMDGPU::VGPR0, in allocateSpecialEntryInputVGPRs()
2206 Info.setWorkItemIDY(ArgDescriptor::createRegister(Reg)); in allocateSpecialEntryInputVGPRs()
2213 Info.setWorkItemIDZ(ArgDescriptor::createRegister(AMDGPU::VGPR0, in allocateSpecialEntryInputVGPRs()
2220 Info.setWorkItemIDZ(ArgDescriptor::createRegister(Reg)); in allocateSpecialEntryInputVGPRs()
2250 return ArgDescriptor::createRegister(Reg, Mask); in allocateVGPR32Input()
2267 return ArgDescriptor::createRegister(Reg); in allocateSGPR32InputImpl()
2329 Info.setWorkItemIDX(ArgDescriptor::createRegister(Reg, Mask)); in allocateSpecialInputVGPRsFixed()
2330 Info.setWorkItemIDY(ArgDescriptor::createRegister(Reg, Mask << 10)); in allocateSpecialInputVGPRsFixed()
2331 Info.setWorkItemIDZ(ArgDescriptor::createRegister(Reg, Mask << 20)); in allocateSpecialInputVGPRsFixed()