4120   MachineBasicBlock *LoopBB = MF->CreateMachineBasicBlock();  in splitBlockForLoop()  local
4125   MF->insert(MBBI, LoopBB);  in splitBlockForLoop()
4128   LoopBB->addSuccessor(LoopBB);  in splitBlockForLoop()
4129   LoopBB->addSuccessor(RemainderBB);  in splitBlockForLoop()
4138     LoopBB->splice(LoopBB->begin(), &MBB, I, Next);  in splitBlockForLoop()
4146   MBB.addSuccessor(LoopBB);  in splitBlockForLoop()
4148   return std::pair(LoopBB, RemainderBB);  in splitBlockForLoop()
4172   MachineBasicBlock *LoopBB;  in emitGWSMemViolTestLoop()  local
4180   std::tie(LoopBB, RemainderBB) = splitBlockForLoop(MI, *BB, true);  in emitGWSMemViolTestLoop()
4182   MachineBasicBlock::iterator I = LoopBB->end();  in emitGWSMemViolTestLoop()
4188   BuildMI(*LoopBB, LoopBB->begin(), DL, TII->get(AMDGPU::S_SETREG_IMM32_B32))  in emitGWSMemViolTestLoop()
4197   BuildMI(*LoopBB, I, DL, TII->get(AMDGPU::S_GETREG_B32), Reg)  in emitGWSMemViolTestLoop()
4201   BuildMI(*LoopBB, I, DL, TII->get(AMDGPU::S_CMP_LG_U32))  in emitGWSMemViolTestLoop()
4204   BuildMI(*LoopBB, I, DL, TII->get(AMDGPU::S_CBRANCH_SCC1))  in emitGWSMemViolTestLoop()
4205     .addMBB(LoopBB);  in emitGWSMemViolTestLoop()
4217                        MachineBasicBlock &OrigBB, MachineBasicBlock &LoopBB,  in emitLoadM0FromVGPRLoop()  argument
4226   MachineBasicBlock::iterator I = LoopBB.begin();  in emitLoadM0FromVGPRLoop()
4234   BuildMI(LoopBB, I, DL, TII->get(TargetOpcode::PHI), PhiReg)  in emitLoadM0FromVGPRLoop()
4238     .addMBB(&LoopBB);  in emitLoadM0FromVGPRLoop()
4240   BuildMI(LoopBB, I, DL, TII->get(TargetOpcode::PHI), PhiExec)  in emitLoadM0FromVGPRLoop()
4244     .addMBB(&LoopBB);  in emitLoadM0FromVGPRLoop()
4247   BuildMI(LoopBB, I, DL, TII->get(AMDGPU::V_READFIRSTLANE_B32), CurrentIdxReg)  in emitLoadM0FromVGPRLoop()
4251   BuildMI(LoopBB, I, DL, TII->get(AMDGPU::V_CMP_EQ_U32_e64), CondReg)  in emitLoadM0FromVGPRLoop()
4256   BuildMI(LoopBB, I, DL, TII->get(ST.isWave32() ? AMDGPU::S_AND_SAVEEXEC_B32  in emitLoadM0FromVGPRLoop()
4268       BuildMI(LoopBB, I, DL, TII->get(AMDGPU::S_ADD_I32), SGPRIdxReg)  in emitLoadM0FromVGPRLoop()
4275       BuildMI(LoopBB, I, DL, TII->get(AMDGPU::S_MOV_B32), AMDGPU::M0)  in emitLoadM0FromVGPRLoop()
4278       BuildMI(LoopBB, I, DL, TII->get(AMDGPU::S_ADD_I32), AMDGPU::M0)  in emitLoadM0FromVGPRLoop()
4287     BuildMI(LoopBB, I, DL, TII->get(ST.isWave32() ? AMDGPU::S_XOR_B32_term  in emitLoadM0FromVGPRLoop()
4296   BuildMI(LoopBB, I, DL, TII->get(AMDGPU::S_CBRANCH_EXECNZ))  in emitLoadM0FromVGPRLoop()
4297     .addMBB(&LoopBB);  in emitLoadM0FromVGPRLoop()
4331   MachineBasicBlock *LoopBB;  in loadM0FromVGPR()  local
4333   std::tie(LoopBB, RemainderBB) = splitBlockForLoop(MI, MBB, false);  in loadM0FromVGPR()
4337   auto InsPt = emitLoadM0FromVGPRLoop(TII, MRI, MBB, *LoopBB, DL, *Idx,  in loadM0FromVGPR()
4342   MachineFunction::iterator MBBI(LoopBB);  in loadM0FromVGPR()
4345   LoopBB->removeSuccessor(RemainderBB);  in loadM0FromVGPR()
4347   LoopBB->addSuccessor(LandingPad);  in loadM0FromVGPR()
4475   MachineBasicBlock *LoopBB = InsPt->getParent();  in emitIndirectSrc()  local
4481     BuildMI(*LoopBB, InsPt, DL, GPRIDXDesc, Dst)  in emitIndirectSrc()
4486     BuildMI(*LoopBB, InsPt, DL, TII->get(AMDGPU::V_MOVRELS_B32_e32), Dst)  in emitIndirectSrc()
4493   return LoopBB;  in emitIndirectSrc()
4576   MachineBasicBlock *LoopBB = InsPt->getParent();  in emitIndirectDst()  local
4582     BuildMI(*LoopBB, InsPt, DL, GPRIDXDesc, Dst)  in emitIndirectDst()
4590     BuildMI(*LoopBB, InsPt, DL, MovRelDesc, Dst)  in emitIndirectDst()
4597   return LoopBB;  in emitIndirectDst()