9985 SDValue SITargetLowering::widenLoad(LoadSDNode *Ld, DAGCombinerInfo &DCI) const {  in widenLoad()  argument
9987   if (Ld->getAlign() < Align(4) || Ld->isDivergent())  in widenLoad()
9991   unsigned AS = Ld->getAddressSpace();  in widenLoad()
9994       (AS != AMDGPUAS::GLOBAL_ADDRESS || !Ld->isInvariant()))  in widenLoad()
10000   EVT MemVT = Ld->getMemoryVT();  in widenLoad()
10005   SDLoc SL(Ld);  in widenLoad()
10007   assert((!MemVT.isVector() || Ld->getExtensionType() == ISD::NON_EXTLOAD) &&  in widenLoad()
10011   SDValue Ptr = Ld->getBasePtr();  in widenLoad()
10013       ISD::UNINDEXED, ISD::NON_EXTLOAD, MVT::i32, SL, Ld->getChain(), Ptr,  in widenLoad()
10014       Ld->getOffset(), Ld->getPointerInfo(), MVT::i32, Ld->getAlign(),  in widenLoad()
10015       Ld->getMemOperand()->getFlags(), Ld->getAAInfo(),  in widenLoad()
10020     assert(Ld->getExtensionType() == ISD::NON_EXTLOAD &&  in widenLoad()
10026   if (Ld->getExtensionType() == ISD::SEXTLOAD) {  in widenLoad()
10029   } else if (Ld->getExtensionType() == ISD::ZEXTLOAD ||  in widenLoad()
10030              Ld->getExtensionType() == ISD::NON_EXTLOAD) {  in widenLoad()
10033     assert(Ld->getExtensionType() == ISD::EXTLOAD);  in widenLoad()
10036   EVT VT = Ld->getValueType(0);  in widenLoad()
10043   Cvt = getLoadExtOrTrunc(DAG, Ld->getExtensionType(), Cvt, SL, IntVT);  in widenLoad()