Lines Matching refs:INSERT_VECTOR_ELT

332       case ISD::INSERT_VECTOR_ELT:  in SITargetLowering()
362 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
363 AddPromotedToType(ISD::INSERT_VECTOR_ELT, Vec64, MVT::v4i32); in SITargetLowering()
376 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
377 AddPromotedToType(ISD::INSERT_VECTOR_ELT, Vec64, MVT::v6i32); in SITargetLowering()
390 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
391 AddPromotedToType(ISD::INSERT_VECTOR_ELT, Vec64, MVT::v8i32); in SITargetLowering()
404 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
405 AddPromotedToType(ISD::INSERT_VECTOR_ELT, Vec64, MVT::v16i32); in SITargetLowering()
418 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
419 AddPromotedToType(ISD::INSERT_VECTOR_ELT, Vec64, MVT::v32i32); in SITargetLowering()
434 setOperationAction({ISD::EXTRACT_VECTOR_ELT, ISD::INSERT_VECTOR_ELT}, in SITargetLowering()
629 case ISD::INSERT_VECTOR_ELT: in SITargetLowering()
769 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec16, Expand); in SITargetLowering()
912 ISD::INSERT_VECTOR_ELT, in SITargetLowering()
5561 case ISD::INSERT_VECTOR_ELT: in LowerOperation()
5883 case ISD::INSERT_VECTOR_ELT: { in ReplaceNodeResults()
6753 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, SL, NewVecVT, Vec, Elt, in lowerINSERT_SUBVECTOR()
6763 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, SL, VecVT, Vec, Elt, in lowerINSERT_SUBVECTOR()
6796 SDValue InsHalf = DAG.getNode(ISD::INSERT_VECTOR_ELT, SL, MVT::v2i16, in lowerINSERT_VECTOR_ELT()
12447 case ISD::INSERT_VECTOR_ELT: { in isCanonicalized()
14467 case ISD::INSERT_VECTOR_ELT: in PerformDAGCombine()