79   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in getVGPRSpillLaneOrTempRegister()  local
80   const SIRegisterInfo *TRI = ST.getRegisterInfo();  in getVGPRSpillLaneOrTempRegister()
134 static void buildPrologSpill(const GCNSubtarget &ST, const SIRegisterInfo &TRI,  in buildPrologSpill()  argument
141   unsigned Opc = ST.enableFlatScratch() ? AMDGPU::SCRATCH_STORE_DWORD_SADDR  in buildPrologSpill()
157 static void buildEpilogRestore(const GCNSubtarget &ST,  in buildEpilogRestore()  argument
165   unsigned Opc = ST.enableFlatScratch() ? AMDGPU::SCRATCH_LOAD_DWORD_SADDR  in buildEpilogRestore()
228   const GCNSubtarget &ST;  member in llvm::PrologEpilogSGPRSpillBuilder
260       buildPrologSpill(ST, TRI, *FuncInfo, LiveUnits, MF, MBB, MI, DL, TmpVGPR,  in saveToMemory()
306       buildEpilogRestore(ST, TRI, *FuncInfo, LiveUnits, MF, MBB, MI, DL,  in restoreFromMemory()
345         ST(MF.getSubtarget<GCNSubtarget>()), MFI(MF.getFrameInfo()),  in PrologEpilogSGPRSpillBuilder()
385   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in emitEntryFunctionFlatScratchInit()  local
386   const SIInstrInfo *TII = ST.getInstrInfo();  in emitEntryFunctionFlatScratchInit()
403   if (ST.isAmdPalOS()) {  in emitEntryFunctionFlatScratchInit()
470   if (ST.flatScratchIsPointer()) {  in emitEntryFunctionFlatScratchInit()
471     if (ST.getGeneration() >= AMDGPUSubtarget::GFX10) {  in emitEntryFunctionFlatScratchInit()
505   assert(ST.getGeneration() < AMDGPUSubtarget::GFX9);  in emitEntryFunctionFlatScratchInit()
541   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in getEntryFunctionReservedScratchRsrcReg()  local
542   const SIInstrInfo *TII = ST.getInstrInfo();  in getEntryFunctionReservedScratchRsrcReg()
555   if (ST.hasSGPRInitBug() ||  in getEntryFunctionReservedScratchRsrcReg()
590 static unsigned getScratchScaleFactor(const GCNSubtarget &ST) {  in getScratchScaleFactor()  argument
591   return ST.enableFlatScratch() ? 1 : ST.getWavefrontSize();  in getScratchScaleFactor()
610   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in emitEntryFunctionPrologue()  local
611   const SIInstrInfo *TII = ST.getInstrInfo();  in emitEntryFunctionPrologue()
629   if (!ST.enableFlatScratch())  in emitEntryFunctionPrologue()
644   if (ST.isAmdHsaOrMesa(F)) {  in emitEntryFunctionPrologue()
691         .addImm(FrameInfo.getStackSize() * getScratchScaleFactor(ST));  in emitEntryFunctionPrologue()
703        (!allStackObjectsAreDead(FrameInfo) && ST.enableFlatScratch()));  in emitEntryFunctionPrologue()
706       PreloadedScratchWaveOffsetReg && !ST.flatScratchIsArchitected()) {  in emitEntryFunctionPrologue()
728   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in emitEntryFunctionScratchRsrcRegSetup()  local
729   const SIInstrInfo *TII = ST.getInstrInfo();  in emitEntryFunctionScratchRsrcRegSetup()
734   if (ST.isAmdPalOS()) {  in emitEntryFunctionScratchRsrcRegSetup()
768     if (ST.isWave32()) {  in emitEntryFunctionScratchRsrcRegSetup()
774   } else if (ST.isMesaGfxShader(Fn) || !PreloadedScratchRsrcReg) {  in emitEntryFunctionScratchRsrcRegSetup()
775     assert(!ST.isAmdHsaOrMesa(Fn));  in emitEntryFunctionScratchRsrcRegSetup()
832   } else if (ST.isAmdHsaOrMesa(Fn)) {  in emitEntryFunctionScratchRsrcRegSetup()
889   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in buildScratchExecCopy()  local
890   const SIInstrInfo *TII = ST.getInstrInfo();  in buildScratchExecCopy()
904       ST.isWave32() ? (EnableInactiveLanes ? AMDGPU::S_XOR_SAVEEXEC_B32  in buildScratchExecCopy()
920   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in emitCSRSpillStores()  local
921   const SIInstrInfo *TII = ST.getInstrInfo();  in emitCSRSpillStores()
940           buildPrologSpill(ST, TRI, *FuncInfo, LiveUnits, MF, MBB, MBBI, DL,  in emitCSRSpillStores()
948       unsigned MovOpc = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;  in emitCSRSpillStores()
960     unsigned ExecMov = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;  in emitCSRSpillStores()
1006   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in emitCSRSpillRestores()  local
1007   const SIInstrInfo *TII = ST.getInstrInfo();  in emitCSRSpillRestores()
1043           buildEpilogRestore(ST, TRI, *FuncInfo, LiveUnits, MF, MBB, MBBI, DL,  in emitCSRSpillRestores()
1051       unsigned MovOpc = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;  in emitCSRSpillRestores()
1063     unsigned ExecMov = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;  in emitCSRSpillRestores()
1078   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in emitPrologue()  local
1079   const SIInstrInfo *TII = ST.getInstrInfo();  in emitPrologue()
1102           .addImm(MFI.getStackSize() * getScratchScaleFactor(ST));  in emitPrologue()
1163         .addImm((Alignment - 1) * getScratchScaleFactor(ST))  in emitPrologue()
1167         .addImm(-Alignment * getScratchScaleFactor(ST))  in emitPrologue()
1198         .addImm(RoundedSize * getScratchScaleFactor(ST))  in emitPrologue()
1227   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in emitEpilogue()  local
1228   const SIInstrInfo *TII = ST.getInstrInfo();  in emitEpilogue()
1280         .addImm(-static_cast<int64_t>(RoundedSize * getScratchScaleFactor(ST)))  in emitEpilogue()
1332   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in processFunctionBeforeFrameFinalized()  local
1333   const SIInstrInfo *TII = ST.getInstrInfo();  in processFunctionBeforeFrameFinalized()
1334   const SIRegisterInfo *TRI = ST.getRegisterInfo();  in processFunctionBeforeFrameFinalized()
1351   const bool SpillVGPRToAGPR = ST.hasMAIInsts() && FuncInfo->hasSpilledVGPRs()  in processFunctionBeforeFrameFinalized()
1449   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in processFunctionBeforeFrameIndicesReplaced()  local
1450   const SIRegisterInfo *TRI = ST.getRegisterInfo();  in processFunctionBeforeFrameIndicesReplaced()
1454   if (ST.hasMAIInsts() && !ST.hasGFX90AInsts()) {  in processFunctionBeforeFrameIndicesReplaced()
1495   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in determinePrologEpilogSGPRSaves()  local
1496   const SIRegisterInfo *TRI = ST.getRegisterInfo();  in determinePrologEpilogSGPRSaves()
1570   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in determineCalleeSaves()  local
1571   const SIRegisterInfo *TRI = ST.getRegisterInfo();  in determineCalleeSaves()
1572   const SIInstrInfo *TII = ST.getInstrInfo();  in determineCalleeSaves()
1620   if (!ST.hasGFX90AInsts())  in determineCalleeSaves()
1647   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in determineCalleeSavesSGPR()  local
1648   const SIRegisterInfo *TRI = ST.getRegisterInfo();  in determineCalleeSavesSGPR()
1691   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in assignCalleeSavedSpillSlots()  local
1692   const SIRegisterInfo *RI = ST.getRegisterInfo();  in assignCalleeSavedSpillSlots()
1727   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in allocateScavengingFrameIndexesNearIncomingSP()  local
1729   const SIInstrInfo *TII = ST.getInstrInfo();  in allocateScavengingFrameIndexesNearIncomingSP()
1740   if (ST.enableFlatScratch()) {  in allocateScavengingFrameIndexesNearIncomingSP()
1760   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();  in eliminateCallFramePseudoInstr()  local
1761   const SIInstrInfo *TII = ST.getInstrInfo();  in eliminateCallFramePseudoInstr()
1773     Amount *= getScratchScaleFactor(ST);  in eliminateCallFramePseudoInstr()