966   Register FramePtrReg = FuncInfo->getFrameOffsetReg();  in emitCSRSpillStores()  local
974         Spill.first == FramePtrReg ? FramePtrRegScratchCopy : Spill.first;  in emitCSRSpillStores()
1009   Register FramePtrReg = FuncInfo->getFrameOffsetReg();  in emitCSRSpillRestores()  local
1018         Spill.first == FramePtrReg ? FramePtrRegScratchCopy : Spill.first;  in emitCSRSpillRestores()
1084   Register FramePtrReg = FuncInfo->getFrameOffsetReg();  in emitPrologue()  local
1123         FuncInfo->getScratchSGPRCopyDstReg(FramePtrReg);  in emitPrologue()
1131           FramePtrReg,  in emitPrologue()
1132           FuncInfo->getPrologEpilogSGPRSaveRestoreInfo(FramePtrReg), MBB, MBBI,  in emitPrologue()
1133           DL, TII, TRI, LiveUnits, FramePtrReg);  in emitPrologue()
1146           .addReg(FramePtrReg);  in emitPrologue()
1161     BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_I32), FramePtrReg)  in emitPrologue()
1165     auto And = BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_AND_B32), FramePtrReg)  in emitPrologue()
1166         .addReg(FramePtrReg, RegState::Kill)  in emitPrologue()
1172     BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), FramePtrReg)  in emitPrologue()
1179     emitCSRSpillStores(MF, MBB, MBBI, DL, LiveUnits, FramePtrReg,  in emitPrologue()
1203   bool FPSaved = FuncInfo->hasPrologEpilogSGPRSpillEntry(FramePtrReg);  in emitPrologue()
1250   Register FramePtrReg = FuncInfo->getFrameOffsetReg();  in emitEpilogue()  local
1251   bool FPSaved = FuncInfo->hasPrologEpilogSGPRSpillEntry(FramePtrReg);  in emitEpilogue()
1255       FuncInfo->getScratchSGPRCopyDstReg(FramePtrReg);  in emitEpilogue()
1273     emitCSRSpillRestores(MF, MBB, MBBI, DL, LiveUnits, FramePtrReg,  in emitEpilogue()
1290         BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), FramePtrReg)  in emitEpilogue()
1538     Register FramePtrReg = MFI->getFrameOffsetReg();  in determinePrologEpilogSGPRSaves()  local
1539     assert(!MFI->hasPrologEpilogSGPRSpillEntry(FramePtrReg) &&  in determinePrologEpilogSGPRSaves()
1541     getVGPRSpillLaneOrTempRegister(MF, LiveUnits, FramePtrReg);  in determinePrologEpilogSGPRSaves()
1693   Register FramePtrReg = FuncInfo->getFrameOffsetReg();  in assignCalleeSavedSpillSlots()  local
1696       FuncInfo->getScratchSGPRCopyDstReg(FramePtrReg);  in assignCalleeSavedSpillSlots()
1710     if (CS.getReg() == FramePtrReg && SGPRForFPSaveRestoreCopy) {  in assignCalleeSavedSpillSlots()