Lines Matching refs:getParent
226 MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo(); in tryChangeVGPRtoSGPRinCopy()
234 const auto *UseMI = MO.getParent(); in tryChangeVGPRtoSGPRinCopy()
237 if (MO.isDef() || UseMI->getParent() != MI.getParent() || in tryChangeVGPRtoSGPRinCopy()
321 BuildMI(*MI.getParent(), &MI, MI.getDebugLoc(), TII->get(AMDGPU::COPY), in foldVGPRCopyIntoRegSequence()
330 BuildMI(*MI.getParent(), &MI, MI.getDebugLoc(), TII->get(Opc), in foldVGPRCopyIntoRegSequence()
413 const MachineBasicBlock *MBBFrom = From->getParent(); in isReachable()
414 const MachineBasicBlock *MBBTo = To->getParent(); in isReachable()
484 const MachineBasicBlock *MBBFrom = From->getParent(); in hoistAndMergeSGPRInits()
485 const MachineBasicBlock *MBBTo = To->getParent(); in hoistAndMergeSGPRInits()
500 MDT.properlyDominates(Clobber->getParent(), MBBTo)); in hoistAndMergeSGPRInits()
514 << printMBBReference(*MI2->getParent()) << " " << *MI2); in hoistAndMergeSGPRInits()
524 << printMBBReference(*MI1->getParent()) << " " << *MI1); in hoistAndMergeSGPRInits()
531 auto *MBB = MDT.findNearestCommonDominator(MI1->getParent(), in hoistAndMergeSGPRInits()
532 MI2->getParent()); in hoistAndMergeSGPRInits()
542 << printMBBReference(*MI1->getParent()) << " " << *MI1 in hoistAndMergeSGPRInits()
544 << printMBBReference(*MI2->getParent()) << " to " in hoistAndMergeSGPRInits()
545 << printMBBReference(*I->getParent()) << " " << *MI2); in hoistAndMergeSGPRInits()
546 I->getParent()->splice(I, MI2->getParent(), MI2); in hoistAndMergeSGPRInits()
576 auto MBB = MI->getParent(); in hoistAndMergeSGPRInits()
589 TII->isSchedulingBoundary(*R, MBB, *MBB->getParent())) in hoistAndMergeSGPRInits()
747 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), in runOnMachineFunction()
806 const MachineInstr *UseMI = Use.getParent(); in processPHINode()
882 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), in lowerSpecialCase()
886 } else if (tryMoveVGPRConstToSGPR(MI.getOperand(1), DstReg, MI.getParent(), in lowerSpecialCase()
906 MI.addImplicitDefUseOperands(*MI.getParent()->getParent()); in lowerSpecialCase()
949 auto E = Inst->getParent()->end(); in analyzeVGPRToSGPRCopy()
1056 MachineBasicBlock *MBB = MI->getParent(); in lowerVGPR2SGPRCopies()
1113 I = BuildMI(*MI.getParent(), std::next(MachineBasicBlock::iterator(MI)), in fixSCCCopies()
1120 I = BuildMI(*MI.getParent(), std::next(I), I->getDebugLoc(), in fixSCCCopies()
1130 I = BuildMI(*MI.getParent(), std::next(MachineBasicBlock::iterator(MI)), in fixSCCCopies()