30 R600TargetLowering::R600TargetLowering(const TargetMachine &TM,  in R600TargetLowering()  function in R600TargetLowering
212 R600TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,  in EmitInstrWithCustomInserter()
396 SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {  in LowerOperation()
579 void R600TargetLowering::ReplaceNodeResults(SDNode *N,  in ReplaceNodeResults()
621 SDValue R600TargetLowering::vectorToVerticalVector(SelectionDAG &DAG,  in vectorToVerticalVector()
636 SDValue R600TargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op,  in LowerEXTRACT_VECTOR_ELT()
651 SDValue R600TargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,  in LowerINSERT_VECTOR_ELT()
668 SDValue R600TargetLowering::LowerGlobalAddress(AMDGPUMachineFunction *MFI,  in LowerGlobalAddress()
683 SDValue R600TargetLowering::LowerTrig(SDValue Op, SelectionDAG &DAG) const {  in LowerTrig()
717 SDValue R600TargetLowering::LowerShiftParts(SDValue Op,  in LowerShiftParts()
724 SDValue R600TargetLowering::LowerUADDSUBO(SDValue Op, SelectionDAG &DAG,  in LowerUADDSUBO()
742 SDValue R600TargetLowering::lowerFP_TO_UINT(SDValue Op, SelectionDAG &DAG) const {  in lowerFP_TO_UINT()
752 SDValue R600TargetLowering::lowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) const {  in lowerFP_TO_SINT()
762 SDValue R600TargetLowering::LowerImplicitParameter(SelectionDAG &DAG, EVT VT,  in LowerImplicitParameter()
777 bool R600TargetLowering::isZero(SDValue Op) const {  in isZero()
787 bool R600TargetLowering::isHWTrueValue(SDValue Op) const {  in isHWTrueValue()
794 bool R600TargetLowering::isHWFalseValue(SDValue Op) const {  in isHWFalseValue()
801 SDValue R600TargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {  in LowerSELECT_CC()
942 SDValue R600TargetLowering::lowerADDRSPACECAST(SDValue Op,  in lowerADDRSPACECAST()
965 SDValue R600TargetLowering::stackPtrToRegIndex(SDValue Ptr,  in stackPtrToRegIndex()
987 void R600TargetLowering::getStackAddress(unsigned StackWidth,  in getStackAddress()
1016 SDValue R600TargetLowering::lowerPrivateTruncStore(StoreSDNode *Store,  in lowerPrivateTruncStore()
1106 SDValue R600TargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {  in LowerSTORE()
1262 SDValue R600TargetLowering::lowerPrivateExtLoad(SDValue Op,  in lowerPrivateExtLoad()
1318 SDValue R600TargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {  in LowerLOAD()
1407 SDValue R600TargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const {  in LowerBRCOND()
1416 SDValue R600TargetLowering::lowerFrameIndex(SDValue Op,  in lowerFrameIndex()
1431 CCAssignFn *R600TargetLowering::CCAssignFnForCall(CallingConv::ID CC,  in CCAssignFnForCall()
1456 SDValue R600TargetLowering::LowerFormalArguments(  in LowerFormalArguments()
1526 EVT R600TargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &,  in getSetCCResultType()
1533 bool R600TargetLowering::canMergeStoresTo(unsigned AS, EVT MemVT,  in canMergeStoresTo()
1542 bool R600TargetLowering::allowsMisalignedMemoryAccesses(  in allowsMisalignedMemoryAccesses()
1644 SDValue R600TargetLowering::OptimizeSwizzle(SDValue BuildVector, SDValue Swz[],  in OptimizeSwizzle()
1668 SDValue R600TargetLowering::constBufferLoad(LoadSDNode *LoadNode, int Block,  in constBufferLoad()
1718 SDValue R600TargetLowering::PerformDAGCombine(SDNode *N,  in PerformDAGCombine()
1945 bool R600TargetLowering::FoldOperand(SDNode *ParentNode, unsigned SrcIdx,  in FoldOperand()
2073 SDNode *R600TargetLowering::PostISelFolding(MachineSDNode *Node,  in PostISelFolding()
2178 R600TargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *RMW) const {  in shouldExpandAtomicRMWInIR()