Lines Matching refs:CPol
181 const int64_t TH = Imm & CPol::TH; in printCPol()
182 const int64_t Scope = Imm & CPol::SCOPE; in printCPol()
190 if (Imm & CPol::GLC) in printCPol()
194 if (Imm & CPol::SLC) in printCPol()
196 if ((Imm & CPol::DLC) && AMDGPU::isGFX10Plus(STI)) in printCPol()
198 if ((Imm & CPol::SCC) && AMDGPU::isGFX90A(STI)) in printCPol()
200 if (Imm & ~CPol::ALL) in printCPol()
220 if (TH & AMDGPU::CPol::TH_ATOMIC_CASCADE) { in printTH()
221 if (Scope >= AMDGPU::CPol::SCOPE_DEV) in printTH()
222 O << "CASCADE" << (TH & AMDGPU::CPol::TH_ATOMIC_NT ? "_NT" : "_RT"); in printTH()
225 } else if (TH & AMDGPU::CPol::TH_ATOMIC_NT) in printTH()
226 O << "NT" << (TH & AMDGPU::CPol::TH_ATOMIC_RETURN ? "_RETURN" : ""); in printTH()
227 else if (TH & AMDGPU::CPol::TH_ATOMIC_RETURN) in printTH()
232 if (!IsStore && TH == AMDGPU::CPol::TH_RESERVED) in printTH()
240 case AMDGPU::CPol::TH_NT: in printTH()
243 case AMDGPU::CPol::TH_HT: in printTH()
246 case AMDGPU::CPol::TH_BYPASS: // or LU or RT_WB in printTH()
247 O << (Scope == AMDGPU::CPol::SCOPE_SYS ? "BYPASS" in printTH()
250 case AMDGPU::CPol::TH_NT_RT: in printTH()
253 case AMDGPU::CPol::TH_RT_NT: in printTH()
256 case AMDGPU::CPol::TH_NT_HT: in printTH()
259 case AMDGPU::CPol::TH_NT_WB: in printTH()
270 if (Scope == CPol::SCOPE_CU) in printScope()
275 if (Scope == CPol::SCOPE_SE) in printScope()
277 else if (Scope == CPol::SCOPE_DEV) in printScope()
279 else if (Scope == CPol::SCOPE_SYS) in printScope()