Lines Matching refs:AMDGPUAsmBackend
29 class AMDGPUAsmBackend : public MCAsmBackend { class
31 AMDGPUAsmBackend(const Target &T) : MCAsmBackend(llvm::endianness::little) {} in AMDGPUAsmBackend() function in __anon247e2c350111::AMDGPUAsmBackend
62 void AMDGPUAsmBackend::relaxInstruction(MCInst &Inst, in relaxInstruction()
71 bool AMDGPUAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup, in fixupNeedsRelaxation()
81 bool AMDGPUAsmBackend::mayNeedRelaxation(const MCInst &Inst, in mayNeedRelaxation()
139 void AMDGPUAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, in applyFixup()
167 AMDGPUAsmBackend::getFixupKind(StringRef Name) const { in getFixupKind()
176 const MCFixupKindInfo &AMDGPUAsmBackend::getFixupKindInfo( in getFixupKindInfo()
194 bool AMDGPUAsmBackend::shouldForceRelocation(const MCAssembler &, in shouldForceRelocation()
201 unsigned AMDGPUAsmBackend::getMinimumNopSize() const { in getMinimumNopSize()
205 bool AMDGPUAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count, in writeNopData()
231 class ELFAMDGPUAsmBackend : public AMDGPUAsmBackend {
238 : AMDGPUAsmBackend(T), Is64Bit(TT.getArch() == Triple::amdgcn), in ELFAMDGPUAsmBackend()