2438   const MachineInstr *MFMA = nullptr;  in checkMAIVALUHazards()  local
2440   auto IsMFMAWriteFn = [&Reg, &MFMA, this](const MachineInstr &MI) {  in checkMAIVALUHazards()
2444     MFMA = &MI;  in checkMAIVALUHazards()
2532       MFMA = nullptr;  in checkMAIVALUHazards()
2535       if (!MFMA)  in checkMAIVALUHazards()
2538       unsigned HazardDefLatency = TSchedModel.computeInstrLatency(MFMA);  in checkMAIVALUHazards()
2544             ? isXDL(ST, *MFMA)  in checkMAIVALUHazards()
2550         assert(isDGEMM(MFMA->getOpcode()) || ST.hasGFX940Insts());  in checkMAIVALUHazards()
2552           isDGEMM(MFMA->getOpcode())  in checkMAIVALUHazards()
2555             : isXDL(ST, *MFMA)  in checkMAIVALUHazards()
2562             ? isXDL(ST, *MFMA)  in checkMAIVALUHazards()
2570           isDGEMM(MFMA->getOpcode())  in checkMAIVALUHazards()
2574               ? isXDL(ST, *MFMA)  in checkMAIVALUHazards()
2634     MFMA = nullptr;  in checkMAIVALUHazards()
2637     if (MFMA) {  in checkMAIVALUHazards()
2639       switch (TSchedModel.computeInstrLatency(MFMA)) {  in checkMAIVALUHazards()
2642           ? isXDL(ST, *MFMA)  in checkMAIVALUHazards()
2648         assert(isDGEMM(MFMA->getOpcode()) || ST.hasGFX940Insts());  in checkMAIVALUHazards()
2649         NeedWaitStates = isDGEMM(MFMA->getOpcode())  in checkMAIVALUHazards()
2651             : isXDL(ST, *MFMA)  in checkMAIVALUHazards()
2657           ? isXDL(ST, *MFMA)  in checkMAIVALUHazards()
2664         NeedWaitStates = isDGEMM(MFMA->getOpcode())  in checkMAIVALUHazards()
2667                      ? isXDL(ST, *MFMA)  in checkMAIVALUHazards()
2681     auto IsSMFMAReadAsCFn = [&Reg, &MFMA, this](const MachineInstr &MI) {  in checkMAIVALUHazards()
2695       MFMA = &MI;  in checkMAIVALUHazards()
2699     MFMA = nullptr;  in checkMAIVALUHazards()
2702     if (!MFMA)  in checkMAIVALUHazards()
2705     unsigned HazardDefLatency = TSchedModel.computeInstrLatency(MFMA);  in checkMAIVALUHazards()