Lines Matching refs:IsHazardFn
499 GCNHazardRecognizer::IsHazardFn IsHazard, const MachineBasicBlock *MBB, in getWaitStatesSince()
534 static int getWaitStatesSince(GCNHazardRecognizer::IsHazardFn IsHazard, in getWaitStatesSince()
542 int GCNHazardRecognizer::getWaitStatesSince(IsHazardFn IsHazard, int Limit) { in getWaitStatesSince()
568 IsHazardFn IsHazardDef, in getWaitStatesSinceDef()
572 auto IsHazardFn = [IsHazardDef, TRI, Reg](const MachineInstr &MI) { in getWaitStatesSinceDef() local
576 return getWaitStatesSince(IsHazardFn, Limit); in getWaitStatesSinceDef()
579 int GCNHazardRecognizer::getWaitStatesSinceSetReg(IsHazardFn IsHazard, in getWaitStatesSinceSetReg()
581 auto IsHazardFn = [IsHazard](const MachineInstr &MI) { in getWaitStatesSinceSetReg() local
585 return getWaitStatesSince(IsHazardFn, Limit); in getWaitStatesSinceSetReg()
790 auto IsHazardFn = [TII, GetRegHWReg](const MachineInstr &MI) { in checkGetRegHazards() local
793 int WaitStatesNeeded = getWaitStatesSinceSetReg(IsHazardFn, GetRegWaitStates); in checkGetRegHazards()
803 auto IsHazardFn = [TII, HWReg](const MachineInstr &MI) { in checkSetRegHazards() local
806 int WaitStatesNeeded = getWaitStatesSinceSetReg(IsHazardFn, SetRegWaitStates); in checkSetRegHazards()
872 auto IsHazardFn = [this, Reg, TRI](const MachineInstr &MI) { in checkVALUHazardsHelper() local
878 VALUWaitStates - getWaitStatesSince(IsHazardFn, VALUWaitStates); in checkVALUHazardsHelper()
1060 auto IsHazardFn = [TII](const MachineInstr &MI) { return TII->isVALU(MI); }; in checkRWLaneHazards() local
1063 int WaitStatesSince = getWaitStatesSinceDef(LaneSelectReg, IsHazardFn, in checkRWLaneHazards()
1076 auto IsHazardFn = [TII](const MachineInstr &MI) { in checkRFEHazards() local
1079 int WaitStatesNeeded = getWaitStatesSinceSetReg(IsHazardFn, RFEWaitStates); in checkRFEHazards()
1086 auto IsHazardFn = [TII](const MachineInstr &MI) { return TII->isSALU(MI); }; in checkReadM0Hazards() local
1088 getWaitStatesSinceDef(AMDGPU::M0, IsHazardFn, ReadM0WaitStates); in checkReadM0Hazards()
1114 auto IsHazardFn = [TII, TRI](const MachineInstr &MI) { in fixVcmpxPermlaneHazards() local
1126 if (::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn) == in fixVcmpxPermlaneHazards()
1157 auto IsHazardFn = [TRI, MI](const MachineInstr &I) { in fixVMEMtoScalarWriteHazards() local
1180 if (::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn) == in fixVMEMtoScalarWriteHazards()
1227 auto IsHazardFn = [SDSTReg, TRI](const MachineInstr &I) { in fixSMEMtoVectorWriteHazards() local
1268 if (::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn) == in fixSMEMtoVectorWriteHazards()
1290 auto IsHazardFn = [TRI](const MachineInstr &I) { in fixVcmpxExecWARHazard() local
1311 if (::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn) == in fixVcmpxExecWARHazard()
1371 auto IsHazardFn = [InstType, &IsHazardInst](const MachineInstr &I) { in fixLdsBranchVmemWARHazard() local
1375 auto IsHazardFn = [InstType, IsHazardInst](const MachineInstr &I) { in fixLdsBranchVmemWARHazard() local
1388 return ::getWaitStatesSince(IsHazardFn, &I, IsExpiredFn) != in fixLdsBranchVmemWARHazard()
1392 if (::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn) == in fixLdsBranchVmemWARHazard()
1414 auto IsHazardFn = [this, VDSTReg, &VisitedTrans](const MachineInstr &I) { in fixLdsDirectVALUHazard() local
1433 auto Count = ::getWaitStatesSince(IsHazardFn, MI->getParent(), in fixLdsDirectVALUHazard()
1456 auto IsHazardFn = [this, VDSTReg](const MachineInstr &I) { in fixLdsDirectVMEMHazard() local
1474 if (::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn) == in fixLdsDirectVMEMHazard()
1537 auto IsHazardFn = [&, this](StateType &State, const MachineInstr &I) { in fixVALUPartialForwardingHazard() local
1627 if (!hasHazard<StateType>(State, IsHazardFn, UpdateStateFn, MI->getParent(), in fixVALUPartialForwardingHazard()
1674 auto IsHazardFn = [&, this](StateType &State, const MachineInstr &I) { in fixVALUTransUseHazard() local
1705 if (!hasHazard<StateType>(State, IsHazardFn, UpdateStateFn, MI->getParent(), in fixVALUTransUseHazard()
1725 auto IsHazardFn = [MI, TII, TRI, this](const MachineInstr &I) { in fixWMMAHazards() local
1783 if (::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn) == in fixWMMAHazards()
1909 auto IsHazardFn = [TII](const MachineInstr &I) { in checkNSAtoVMEMHazard() local
1917 return NSAtoVMEMWaitStates - getWaitStatesSince(IsHazardFn, 1); in checkNSAtoVMEMHazard()
1930 auto IsHazardFn = [](const MachineInstr &I) { in checkFPAtomicToDenormModeHazard() local
1956 ::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn); in checkFPAtomicToDenormModeHazard()
2777 auto IsHazardFn = [HazardReg, this](const MachineInstr &I) { in fixVALUMaskWriteHazard() local
2860 if (::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn) == in fixVALUMaskWriteHazard()