Lines Matching refs:isRegOrImmWithInputMods

273   bool isRegOrImmWithInputMods(unsigned RCID, MVT type) const {  in isRegOrImmWithInputMods()  function in __anoneb28f2920111::AMDGPUOperand
278 return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::i16); in isRegOrImmWithInt16InputMods()
282 return isRegOrImmWithInputMods(AMDGPU::VS_16RegClassID, MVT::i16); in isRegOrImmWithIntT16InputMods()
286 return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::i32); in isRegOrImmWithInt32InputMods()
298 return isRegOrImmWithInputMods(AMDGPU::VS_64RegClassID, MVT::i64); in isRegOrImmWithInt64InputMods()
302 return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::f16); in isRegOrImmWithFP16InputMods()
306 return isRegOrImmWithInputMods(AMDGPU::VS_16RegClassID, MVT::f16); in isRegOrImmWithFPT16InputMods()
310 return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::f32); in isRegOrImmWithFP32InputMods()
314 return isRegOrImmWithInputMods(AMDGPU::VS_64RegClassID, MVT::f64); in isRegOrImmWithFP64InputMods()
8200 static bool isRegOrImmWithInputMods(const MCInstrDesc &Desc, unsigned OpNum) { in isRegOrImmWithInputMods() function
8226 if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) { in cvtVOP3Interp()
8264 if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) { in cvtVINTERP()
8323 if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) { in cvtVOP3()
8910 } else if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) { in cvtVOP3DPP()
8983 } else if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) { in cvtDPP()
8993 if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) { in cvtDPP()
9138 if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) { in cvtSDWA()