Lines Matching refs:addPass
630 PM.addPass(AMDGPUAttributorPass(*this)); in registerPassBuilderCallbacks()
634 PM.addPass(AMDGPUUnifyMetadataPass()); in registerPassBuilderCallbacks()
638 PM.addPass(AMDGPUPrintfRuntimeBindingPass()); in registerPassBuilderCallbacks()
642 PM.addPass(AMDGPUAlwaysInlinePass()); in registerPassBuilderCallbacks()
646 PM.addPass(AMDGPULowerModuleLDSPass(*this)); in registerPassBuilderCallbacks()
650 PM.addPass(AMDGPUCtorDtorLoweringPass()); in registerPassBuilderCallbacks()
659 PM.addPass(AMDGPUSimplifyLibCallsPass()); in registerPassBuilderCallbacks()
663 PM.addPass(AMDGPUImageIntrinsicOptimizerPass(*this)); in registerPassBuilderCallbacks()
667 PM.addPass(AMDGPUUseNativeCallsPass()); in registerPassBuilderCallbacks()
671 PM.addPass(AMDGPUPromoteAllocaPass(*this)); in registerPassBuilderCallbacks()
675 PM.addPass(AMDGPUPromoteAllocaToVectorPass(*this)); in registerPassBuilderCallbacks()
679 PM.addPass(AMDGPULowerKernelAttributesPass()); in registerPassBuilderCallbacks()
683 PM.addPass(AMDGPUPromoteKernelArgumentsPass()); in registerPassBuilderCallbacks()
687 PM.addPass(AMDGPUUnifyDivergentExitNodesPass()); in registerPassBuilderCallbacks()
691 PM.addPass( in registerPassBuilderCallbacks()
696 PM.addPass(AMDGPUCodeGenPreparePass(*this)); in registerPassBuilderCallbacks()
700 PM.addPass(AMDGPULowerKernelArgumentsPass(*this)); in registerPassBuilderCallbacks()
704 PM.addPass(AMDGPURewriteUndefForPHIPass()); in registerPassBuilderCallbacks()
725 FPM.addPass(AMDGPUUseNativeCallsPass()); in registerPassBuilderCallbacks()
727 FPM.addPass(AMDGPUSimplifyLibCallsPass()); in registerPassBuilderCallbacks()
728 PM.addPass(createModuleToFunctionPassAdaptor(std::move(FPM))); in registerPassBuilderCallbacks()
730 PM.addPass(HipStdParAcceleratorCodeSelectionPass()); in registerPassBuilderCallbacks()
735 PM.addPass(AMDGPUPrintfRuntimeBindingPass()); in registerPassBuilderCallbacks()
740 PM.addPass(AMDGPUUnifyMetadataPass()); in registerPassBuilderCallbacks()
743 PM.addPass(InternalizePass(mustPreserveGV)); in registerPassBuilderCallbacks()
744 PM.addPass(GlobalDCEPass()); in registerPassBuilderCallbacks()
748 PM.addPass(AMDGPUAlwaysInlinePass()); in registerPassBuilderCallbacks()
763 FPM.addPass(AMDGPUPromoteKernelArgumentsPass()); in registerPassBuilderCallbacks()
767 FPM.addPass(InferAddressSpacesPass()); in registerPassBuilderCallbacks()
771 FPM.addPass(AMDGPULowerKernelAttributesPass()); in registerPassBuilderCallbacks()
777 FPM.addPass(AMDGPUPromoteAllocaToVectorPass(*this)); in registerPassBuilderCallbacks()
780 PM.addPass(createCGSCCToFunctionPassAdaptor(std::move(FPM))); in registerPassBuilderCallbacks()
986 addPass(createGVNPass()); in addEarlyCSEOrGVNPass()
988 addPass(createEarlyCSEPass()); in addEarlyCSEOrGVNPass()
993 addPass(createLoopDataPrefetchPass()); in addStraightLineScalarOptimizationPasses()
994 addPass(createSeparateConstOffsetFromGEPPass()); in addStraightLineScalarOptimizationPasses()
997 addPass(createStraightLineStrengthReducePass()); in addStraightLineScalarOptimizationPasses()
1002 addPass(createNaryReassociatePass()); in addStraightLineScalarOptimizationPasses()
1005 addPass(createEarlyCSEPass()); in addStraightLineScalarOptimizationPasses()
1013 addPass(createAMDGPURemoveIncompatibleFunctionsPass(&TM)); in addIRPasses()
1020 addPass(createAMDGPUPrintfRuntimeBinding()); in addIRPasses()
1022 addPass(createAMDGPUCtorDtorLoweringLegacyPass()); in addIRPasses()
1025 addPass(createAMDGPUImageIntrinsicOptimizerPass(&TM)); in addIRPasses()
1028 addPass(createAMDGPUAlwaysInlinePass()); in addIRPasses()
1029 addPass(createAlwaysInlinerLegacyPass()); in addIRPasses()
1033 addPass(createR600OpenCLImageTypeLoweringPass()); in addIRPasses()
1036 addPass(createAMDGPUOpenCLEnqueuedBlockLoweringPass()); in addIRPasses()
1040 addPass(createAMDGPULowerModuleLDSLegacyPass(&TM)); in addIRPasses()
1046 addPass(createAMDGPUAttributorLegacyPass()); in addIRPasses()
1049 addPass(createInferAddressSpacesPass()); in addIRPasses()
1055 addPass(createAMDGPUAtomicOptimizerPass(AMDGPUAtomicOptimizerStrategy)); in addIRPasses()
1058 addPass(createAtomicExpandPass()); in addIRPasses()
1061 addPass(createAMDGPUPromoteAlloca()); in addIRPasses()
1067 addPass(createAMDGPUAAWrapperPass()); in addIRPasses()
1068 addPass(createExternalAAWrapperPass([](Pass &P, Function &, in addIRPasses()
1077 addPass(createAMDGPUCodeGenPreparePass()); in addIRPasses()
1083 addPass(createLICMPass()); in addIRPasses()
1108 addPass(createAMDGPUAnnotateKernelFeaturesPass()); in addCodeGenPrepare()
1113 addPass(createAMDGPULowerKernelArgumentsPass()); in addCodeGenPrepare()
1118 addPass(createLoadStoreVectorizerPass()); in addCodeGenPrepare()
1124 addPass(createLowerSwitchPass()); in addCodeGenPrepare()
1129 addPass(createFlattenCFGPass()); in addPreISel()
1134 addPass(createAMDGPUISelDag(getAMDGPUTargetMachine(), getOptLevel())); in addInstSelector()
1180 addPass(createAMDGPULateCodeGenPreparePass()); in addPreISel()
1183 addPass(createSinkingPass()); in addPreISel()
1187 addPass(&AMDGPUUnifyDivergentExitNodesID); in addPreISel()
1190 addPass(createFixIrreduciblePass()); in addPreISel()
1191 addPass(createUnifyLoopExitsPass()); in addPreISel()
1193 addPass(createStructurizeCFGPass(false)); // true -> SkipUniformRegions in addPreISel()
1195 addPass(createAMDGPUAnnotateUniformValues()); in addPreISel()
1197 addPass(createSIAnnotateControlFlowPass()); in addPreISel()
1201 addPass(createAMDGPURewriteUndefForPHILegacyPass()); in addPreISel()
1203 addPass(createLCSSAPass()); in addPreISel()
1206 addPass(&AMDGPUPerfHintAnalysisID); in addPreISel()
1221 addPass(&SIFoldOperandsID); in addMachineSSAOptimization()
1223 addPass(&GCNDPPCombineID); in addMachineSSAOptimization()
1224 addPass(&SILoadStoreOptimizerID); in addMachineSSAOptimization()
1226 addPass(&SIPeepholeSDWAID); in addMachineSSAOptimization()
1227 addPass(&EarlyMachineLICMID); in addMachineSSAOptimization()
1228 addPass(&MachineCSEID); in addMachineSSAOptimization()
1229 addPass(&SIFoldOperandsID); in addMachineSSAOptimization()
1231 addPass(&DeadMachineInstructionElimID); in addMachineSSAOptimization()
1232 addPass(createSIShrinkInstructionsPass()); in addMachineSSAOptimization()
1237 addPass(&EarlyIfConverterID); in addILPOpts()
1245 addPass(&SIFixSGPRCopiesID); in addInstSelector()
1246 addPass(createSILowerI1CopiesPass()); in addInstSelector()
1251 addPass(new IRTranslator(getOptLevel())); in addIRTranslator()
1257 addPass(createAMDGPUPreLegalizeCombiner(IsOptNone)); in addPreLegalizeMachineIR()
1258 addPass(new Localizer()); in addPreLegalizeMachineIR()
1262 addPass(new Legalizer()); in addLegalizeMachineIR()
1268 addPass(createAMDGPUPostLegalizeCombiner(IsOptNone)); in addPreRegBankSelect()
1269 addPass(createAMDGPUGlobalISelDivergenceLoweringPass()); in addPreRegBankSelect()
1273 addPass(new AMDGPURegBankSelect()); in addRegBankSelect()
1279 addPass(createAMDGPURegBankCombiner(IsOptNone)); in addPreGlobalInstructionSelect()
1283 addPass(new InstructionSelect(getOptLevel())); in addGlobalInstructionSelect()
1289 addPass(createAMDGPUMachineCFGStructurizerPass()); in addPreRegAlloc()
1344 addPass(&SILowerWWMCopiesID); in addPreRewrite()
1346 addPass(&GCNNSAReassignID); in addPreRewrite()
1391 addPass(&GCNPreRALongBranchRegID); in addRegAssignAndRewriteFast()
1393 addPass(createSGPRAllocPass(false)); in addRegAssignAndRewriteFast()
1396 addPass(&SILowerSGPRSpillsID); in addRegAssignAndRewriteFast()
1397 addPass(&SIPreAllocateWWMRegsID); in addRegAssignAndRewriteFast()
1399 addPass(createVGPRAllocPass(false)); in addRegAssignAndRewriteFast()
1401 addPass(&SILowerWWMCopiesID); in addRegAssignAndRewriteFast()
1409 addPass(&GCNPreRALongBranchRegID); in addRegAssignAndRewriteOptimized()
1411 addPass(createSGPRAllocPass(true)); in addRegAssignAndRewriteOptimized()
1417 addPass(createVirtRegRewriter(false)); in addRegAssignAndRewriteOptimized()
1420 addPass(&SILowerSGPRSpillsID); in addRegAssignAndRewriteOptimized()
1421 addPass(&SIPreAllocateWWMRegsID); in addRegAssignAndRewriteOptimized()
1423 addPass(createVGPRAllocPass(true)); in addRegAssignAndRewriteOptimized()
1426 addPass(&VirtRegRewriterID); in addRegAssignAndRewriteOptimized()
1428 addPass(&AMDGPUMarkLastScratchLoadID); in addRegAssignAndRewriteOptimized()
1434 addPass(&SIFixVGPRCopiesID); in addPostRegAlloc()
1436 addPass(&SIOptimizeExecMaskingID); in addPostRegAlloc()
1442 addPass(createSIShrinkInstructionsPass()); in addPreSched2()
1443 addPass(&SIPostRABundlerID); in addPreSched2()
1448 addPass(&GCNCreateVOPDID); in addPreEmitPass()
1449 addPass(createSIMemoryLegalizerPass()); in addPreEmitPass()
1450 addPass(createSIInsertWaitcntsPass()); in addPreEmitPass()
1452 addPass(createSIModeRegisterPass()); in addPreEmitPass()
1455 addPass(&SIInsertHardClausesID); in addPreEmitPass()
1457 addPass(&SILateBranchLoweringPassID); in addPreEmitPass()
1459 addPass(createAMDGPUSetWavePriorityPass()); in addPreEmitPass()
1461 addPass(&SIPreEmitPeepholeID); in addPreEmitPass()
1470 addPass(&PostRAHazardRecognizerID); in addPreEmitPass()
1473 addPass(&AMDGPUInsertSingleUseVDSTID); in addPreEmitPass()
1476 addPass(&AMDGPUInsertDelayAluID); in addPreEmitPass()
1478 addPass(&BranchRelaxationPassID); in addPreEmitPass()