Lines Matching refs:AMDGPUPerfHint
65 struct AMDGPUPerfHint { struct
69 AMDGPUPerfHint(AMDGPUPerfHintAnalysis::FuncInfoMap &FIM_, in AMDGPUPerfHint() function
138 bool AMDGPUPerfHint::isIndirectAccess(const Instruction *Inst) const { in isIndirectAccess()
201 bool AMDGPUPerfHint::isGlobalLoadUsedInBB(const Instruction &I) const { in isGlobalLoadUsedInBB()
218 AMDGPUPerfHintAnalysis::FuncInfo *AMDGPUPerfHint::visit(const Function &F) { in visit()
287 bool AMDGPUPerfHint::runOnFunction(Function &F) { in runOnFunction()
322 bool AMDGPUPerfHint::isMemBound(const AMDGPUPerfHintAnalysis::FuncInfo &FI) { in isMemBound()
331 bool AMDGPUPerfHint::needLimitWave(const AMDGPUPerfHintAnalysis::FuncInfo &FI) { in needLimitWave()
336 bool AMDGPUPerfHint::isGlobalAddr(const Value *V) const { in isGlobalAddr()
345 bool AMDGPUPerfHint::isLocalAddr(const Value *V) const { in isLocalAddr()
351 bool AMDGPUPerfHint::isLargeStride(const Instruction *Inst) { in isLargeStride()
362 AMDGPUPerfHint::MemAccessInfo
363 AMDGPUPerfHint::makeMemAccessInfo(Instruction *Inst) const { in makeMemAccessInfo()
377 bool AMDGPUPerfHint::MemAccessInfo::isLargeStride( in isLargeStride()
407 AMDGPUPerfHint Analyzer(FIM, ST->getTargetLowering()); in runOnSCC()
421 return AMDGPUPerfHint::isMemBound(FI->second); in isMemoryBound()
429 return AMDGPUPerfHint::needLimitWave(FI->second); in needsWaveLimiter()