Lines Matching refs:getReg
505 const LLT PointerTy = MRI.getType(MO.getReg()); in castBufferRsrcFromV4I32()
523 B.buildExtractVectorElementConstant(S32, VectorReg, I).getReg(0); in castBufferRsrcFromV4I32()
554 PointerParts.push_back(Unmerged.getReg(I)); in castBufferRsrcToV4I32()
555 return B.buildBuildVector(VectorTy, PointerParts).getReg(0); in castBufferRsrcToV4I32()
557 Register Scalar = B.buildPtrToInt(ScalarTy, Pointer).getReg(0); in castBufferRsrcToV4I32()
558 return B.buildBitcast(VectorTy, Scalar).getReg(0); in castBufferRsrcToV4I32()
565 const LLT PointerTy = B.getMRI()->getType(MO.getReg()); in castBufferRsrcArgToV4I32()
569 MO.setReg(castBufferRsrcToV4I32(MO.getReg(), B)); in castBufferRsrcArgToV4I32()
2133 return B.buildUnmerge(S32, Dst).getReg(1); in getSegmentAperture()
2165 B.buildConstant(LLT::scalar(64), Offset).getReg(0)); in getSegmentAperture()
2167 return B.buildLoad(S32, LoadAddr, *MMO).getReg(0); in getSegmentAperture()
2187 B.buildConstant(LLT::scalar(64), StructOffset).getReg(0)); in getSegmentAperture()
2188 return B.buildLoad(S32, LoadAddr, *MMO).getReg(0); in getSegmentAperture()
2218 Register Dst = MI.getOperand(0).getReg(); in legalizeAddrSpaceCast()
2219 Register Src = MI.getOperand(1).getReg(); in legalizeAddrSpaceCast()
2257 B.buildICmp(CmpInst::ICMP_NE, LLT::scalar(1), Src, FlatNull.getReg(0)); in legalizeAddrSpaceCast()
2258 B.buildSelect(Dst, CmpRes, PtrLo32, SegmentNull.getReg(0)); in legalizeAddrSpaceCast()
2272 Register SrcAsInt = B.buildPtrToInt(S32, Src).getReg(0); in legalizeAddrSpaceCast()
2288 SegmentNull.getReg(0)); in legalizeAddrSpaceCast()
2328 Register Src = MI.getOperand(1).getReg(); in legalizeFroundeven()
2346 B.buildSelect(MI.getOperand(0).getReg(), Cond, Src, Tmp2); in legalizeFroundeven()
2358 Register Src = MI.getOperand(1).getReg(); in legalizeFceil()
2375 B.buildFAdd(MI.getOperand(0).getReg(), Trunc, Add); in legalizeFceil()
2383 Register DstReg = MI.getOperand(0).getReg(); in legalizeFrem()
2384 Register Src0Reg = MI.getOperand(1).getReg(); in legalizeFrem()
2385 Register Src1Reg = MI.getOperand(2).getReg(); in legalizeFrem()
2408 .addUse(Const0.getReg(0)) in extractF64Exponent()
2409 .addUse(Const1.getReg(0)); in extractF64Exponent()
2421 Register Src = MI.getOperand(1).getReg(); in legalizeIntrinsicTrunc()
2426 Register Hi = Unmerge.getReg(1); in legalizeIntrinsicTrunc()
2454 B.buildSelect(MI.getOperand(0).getReg(), ExpGt51, Src, Tmp1); in legalizeIntrinsicTrunc()
2463 Register Dst = MI.getOperand(0).getReg(); in legalizeITOFP()
2464 Register Src = MI.getOperand(1).getReg(); in legalizeITOFP()
2475 auto CvtHi = Signed ? B.buildSITOFP(S64, Unmerge.getReg(1)) in legalizeITOFP()
2476 : B.buildUITOFP(S64, Unmerge.getReg(1)); in legalizeITOFP()
2478 auto CvtLo = B.buildUITOFP(S64, Unmerge.getReg(0)); in legalizeITOFP()
2494 auto X = B.buildXor(S32, Unmerge.getReg(0), Unmerge.getReg(1)); in legalizeITOFP()
2498 .addUse(Unmerge.getReg(1)); in legalizeITOFP()
2502 ShAmt = B.buildCTLZ(S32, Unmerge.getReg(1)); in legalizeITOFP()
2505 auto Adjust = B.buildUMin(S32, One, Unmerge2.getReg(0)); in legalizeITOFP()
2506 auto Norm2 = B.buildOr(S32, Unmerge2.getReg(1), Adjust); in legalizeITOFP()
2521 Register Dst = MI.getOperand(0).getReg(); in legalizeFPTOI()
2522 Register Src = MI.getOperand(1).getReg(); in legalizeFPTOI()
2612 Register Dst = MI.getOperand(0).getReg(); in legalizeExtractVectorElt()
2613 Register Vec = MI.getOperand(1).getReg(); in legalizeExtractVectorElt()
2640 getIConstantVRegValWithLookThrough(MI.getOperand(2).getReg(), MRI); in legalizeExtractVectorElt()
2647 B.buildCopy(Dst, Unmerge.getReg(IdxVal)); in legalizeExtractVectorElt()
2663 Register Dst = MI.getOperand(0).getReg(); in legalizeInsertVectorElt()
2664 Register Vec = MI.getOperand(1).getReg(); in legalizeInsertVectorElt()
2665 Register Ins = MI.getOperand(2).getReg(); in legalizeInsertVectorElt()
2694 getIConstantVRegValWithLookThrough(MI.getOperand(3).getReg(), MRI); in legalizeInsertVectorElt()
2707 SrcRegs[IdxVal] = MI.getOperand(2).getReg(); in legalizeInsertVectorElt()
2721 Register DstReg = MI.getOperand(0).getReg(); in legalizeSinCos()
2722 Register SrcReg = MI.getOperand(1).getReg(); in legalizeSinCos()
2731 .addUse(MulVal.getReg(0)) in legalizeSinCos()
2733 .getReg(0); in legalizeSinCos()
2735 TrigVal = B.buildFMul(Ty, SrcReg, OneOver2Pi, Flags).getReg(0); in legalizeSinCos()
2857 Register DstReg = MI.getOperand(0).getReg(); in legalizeGlobalValue()
2974 Register PtrReg = MI.getOperand(1).getReg(); in legalizeLoad()
2982 MI.getOperand(1).setReg(Cast.getReg(0)); in legalizeLoad()
2990 Register ValReg = MI.getOperand(0).getReg(); in legalizeLoad()
3032 WideLoad = B.buildLoadFromOffset(WideTy, PtrReg, *MMO, 0).getReg(0); in legalizeLoad()
3033 B.buildTrunc(ValReg, WideLoad).getReg(0); in legalizeLoad()
3040 WideLoad = B.buildLoadFromOffset(WideTy, PtrReg, *MMO, 0).getReg(0); in legalizeLoad()
3045 WideLoad = B.buildLoadFromOffset(WideTy, PtrReg, *MMO, 0).getReg(0); in legalizeLoad()
3063 Register DataReg = MI.getOperand(0).getReg(); in legalizeStore()
3078 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeFMad()
3101 Register DstReg = MI.getOperand(0).getReg(); in legalizeAtomicCmpXChg()
3102 Register PtrReg = MI.getOperand(1).getReg(); in legalizeAtomicCmpXChg()
3103 Register CmpVal = MI.getOperand(2).getReg(); in legalizeAtomicCmpXChg()
3104 Register NewVal = MI.getOperand(3).getReg(); in legalizeAtomicCmpXChg()
3112 Register PackedVal = B.buildBuildVector(VecTy, { NewVal, CmpVal }).getReg(0); in legalizeAtomicCmpXChg()
3140 if (DefMI->getOperand(0).getReg() == Src) in valueIsKnownNeverF32Denorm()
3145 return MRI.getType(DefMI->getOperand(1).getReg()) == LLT::scalar(16); in valueIsKnownNeverF32Denorm()
3186 return {ScaledInput.getReg(0), IsLtSmallestNormal.getReg(0)}; in getScaledLogInput()
3197 Register Dst = MI.getOperand(0).getReg(); in legalizeFlog2()
3198 Register Src = MI.getOperand(1).getReg(); in legalizeFlog2()
3207 .addUse(Ext.getReg(0)) in legalizeFlog2()
3242 return B.buildFAdd(Ty, FMul, Z, Flags).getReg(0); in getMad()
3251 Register Dst = MI.getOperand(0).getReg(); in legalizeFlogCommon()
3252 Register X = MI.getOperand(1).getReg(); in legalizeFlogCommon()
3268 legalizeFlogUnsafe(B, LogVal, PromoteSrc.getReg(0), IsLog10, Flags); in legalizeFlogCommon()
3298 R = B.buildFMul(Ty, Y, C, Flags).getReg(0); in legalizeFlogCommon()
3302 R = B.buildFAdd(Ty, R, FMA1, Flags).getReg(0); in legalizeFlogCommon()
3321 getMad(B, Ty, YH.getReg(0), CT.getReg(0), YTCT.getReg(0), Flags); in legalizeFlogCommon()
3322 Register Mad1 = getMad(B, Ty, YT.getReg(0), CH.getReg(0), Mad0, Flags); in legalizeFlogCommon()
3323 R = getMad(B, Ty, YH.getReg(0), CH.getReg(0), Mad1, Flags); in legalizeFlogCommon()
3336 R = B.buildSelect(Ty, IsFinite, R, Y, Flags).getReg(0); in legalizeFlogCommon()
3399 Register Dst = MI.getOperand(0).getReg(); in legalizeFExp2()
3400 Register Src = MI.getOperand(1).getReg(); in legalizeFExp2()
3410 .addUse(Ext.getReg(0)) in legalizeFExp2()
3441 .addUse(AddInput.getReg(0)) in legalizeFExp2()
3463 .addUse(Mul.getReg(0)) in legalizeFExpUnsafe()
3466 B.buildFExp2(Dst, Mul.getReg(0), Flags); in legalizeFExpUnsafe()
3483 .addUse(ExpInput.getReg(0)) in legalizeFExpUnsafe()
3494 Register Dst = MI.getOperand(0).getReg(); in legalizeFExp()
3495 Register X = MI.getOperand(1).getReg(); in legalizeFExp()
3519 legalizeFExpUnsafe(B, Lowered, Ext.getReg(0), Flags); in legalizeFExp()
3569 PH = B.buildFMul(Ty, X, C, Flags).getReg(0); in legalizeFExp()
3574 PL = B.buildFMA(Ty, X, CC, FMA0, Flags).getReg(0); in legalizeFExp()
3587 PH = B.buildFMul(Ty, XH, CH, Flags).getReg(0); in legalizeFExp()
3593 getMad(B, Ty, XL.getReg(0), CH.getReg(0), XLCL.getReg(0), Flags); in legalizeFExp()
3594 PL = getMad(B, Ty, XH.getReg(0), CL.getReg(0), Mad0, Flags); in legalizeFExp()
3605 .addUse(A.getReg(0)) in legalizeFExp()
3636 Register Dst = MI.getOperand(0).getReg(); in legalizeFPow()
3637 Register Src0 = MI.getOperand(1).getReg(); in legalizeFPow()
3638 Register Src1 = MI.getOperand(2).getReg(); in legalizeFPow()
3647 .addUse(Log.getReg(0)) in legalizeFPow()
3657 .addUse(Ext0.getReg(0)) in legalizeFPow()
3658 .addUse(Ext1.getReg(0)) in legalizeFPow()
3672 ModSrc = SrcFNeg->getOperand(1).getReg(); in stripAnySourceMods()
3674 ModSrc = SrcFAbs->getOperand(1).getReg(); in stripAnySourceMods()
3676 ModSrc = SrcFAbs->getOperand(1).getReg(); in stripAnySourceMods()
3686 Register Dst = MI.getOperand(0).getReg(); in legalizeFFloor()
3687 Register OrigSrc = MI.getOperand(1).getReg(); in legalizeFFloor()
3727 CorrectedFract = B.buildSelect(F64, IsNan, ModSrc, Min, Flags).getReg(0); in legalizeFFloor()
3741 Register Dst = MI.getOperand(0).getReg(); in legalizeBuildVector()
3746 Register Src0 = MI.getOperand(1).getReg(); in legalizeBuildVector()
3747 Register Src1 = MI.getOperand(2).getReg(); in legalizeBuildVector()
3751 Src0 = B.buildTrunc(S16, MI.getOperand(1).getReg()).getReg(0); in legalizeBuildVector()
3752 Src1 = B.buildTrunc(S16, MI.getOperand(2).getReg()).getReg(0); in legalizeBuildVector()
3793 Zero32 = B.buildConstant(S32, 0).getReg(0); in buildMultiply()
3798 Zero64 = B.buildConstant(S64, 0).getReg(0); in buildMultiply()
3821 LocalAccum = B.buildZExt(S32, CarryIn[0]).getReg(0); in buildMultiply()
3827 CarryAccum = B.buildZExt(S32, CarryIn[0]).getReg(0); in buildMultiply()
3831 .getReg(0); in buildMultiply()
3842 LocalAccum = Add.getReg(0); in buildMultiply()
3843 return HaveCarryOut ? Add.getReg(1) : Register(); in buildMultiply()
3878 LocalAccum[0] = Mul.getReg(0); in buildMultiply()
3881 LocalAccum[0] = B.buildAdd(S32, LocalAccum[0], Mul).getReg(0); in buildMultiply()
3885 .getReg(0); in buildMultiply()
3900 Tmp = B.buildAnyExt(S64, LocalAccum[0]).getReg(0); in buildMultiply()
3903 Tmp = B.buildMergeLikeInstr(S64, LocalAccum).getReg(0); in buildMultiply()
3906 Tmp = B.buildZExt(S64, LocalAccum[0]).getReg(0); in buildMultiply()
3923 Tmp = Mad.getReg(0); in buildMultiply()
3925 CarryOut.push_back(Mad.getReg(1)); in buildMultiply()
3932 LocalAccum[0] = Unmerge.getReg(0); in buildMultiply()
3934 LocalAccum[1] = Unmerge.getReg(1); in buildMultiply()
3996 Accum[2 * i - 1] = Lo->getOperand(0).getReg(); in buildMultiply()
4000 Lo->getOperand(1).getReg()); in buildMultiply()
4001 Accum[2 * i] = Hi.getReg(0); in buildMultiply()
4002 SeparateOddCarry = Hi.getReg(1); in buildMultiply()
4032 Register DstReg = MI.getOperand(0).getReg(); in legalizeMul()
4033 Register Src0 = MI.getOperand(1).getReg(); in legalizeMul()
4034 Register Src1 = MI.getOperand(2).getReg(); in legalizeMul()
4078 Register Dst = MI.getOperand(0).getReg(); in legalizeCTLZ_CTTZ()
4079 Register Src = MI.getOperand(1).getReg(); in legalizeCTLZ_CTTZ()
4097 auto ConstVal = getIConstantVRegSExtVal(MI.getOperand(2).getReg(), MRI); in isNot()
4105 Register CondDef = MI.getOperand(0).getReg(); in verifyCFIntrinsic()
4113 Register NegatedCond = UseMI->getOperand(0).getReg(); in verifyCFIntrinsic()
4166 AndMaskSrc = B.buildLShr(S32, LiveIn, ShiftAmt).getReg(0); in loadInputValue()
4243 if (!loadInputValue(MI.getOperand(0).getReg(), B, ArgType)) in legalizePreloadedArgIntrin()
4252 B.buildConstant(MI.getOperand(0).getReg(), C); in replaceWithConstant()
4270 Register DstReg = MI.getOperand(0).getReg(); in legalizeWorkitemIDIntrinsic()
4310 return B.buildPtrAdd(PtrTy, KernArgReg, COffset).getReg(0); in getKernargParameterPtr()
4319 Register DstReg = MI.getOperand(0).getReg(); in legalizeKernargMemParameter()
4336 Register Dst = MI.getOperand(0).getReg(); in legalizeFDIV()
4413 auto CvtLo = B.buildUITOFP(S32, Unmerge.getReg(0)); in emitReciprocalU64()
4414 auto CvtHi = B.buildUITOFP(S32, Unmerge.getReg(1)); in emitReciprocalU64()
4437 return {ResultLo.getReg(0), ResultHi.getReg(0)}; in emitReciprocalU64()
4461 Register MulHi1_Lo = UnmergeMulHi1.getReg(0); in legalizeUnsignedDIV_REM64Impl()
4462 Register MulHi1_Hi = UnmergeMulHi1.getReg(1); in legalizeUnsignedDIV_REM64Impl()
4465 auto Add1_Hi = B.buildUAdde(S32, S1, RcpHi, MulHi1_Hi, Add1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
4471 Register MulHi2_Lo = UnmergeMulHi2.getReg(0); in legalizeUnsignedDIV_REM64Impl()
4472 Register MulHi2_Hi = UnmergeMulHi2.getReg(1); in legalizeUnsignedDIV_REM64Impl()
4476 auto Add2_Hi = B.buildUAdde(S32, S1, Add1_Hi, MulHi2_Hi, Add2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
4480 Register NumerLo = UnmergeNumer.getReg(0); in legalizeUnsignedDIV_REM64Impl()
4481 Register NumerHi = UnmergeNumer.getReg(1); in legalizeUnsignedDIV_REM64Impl()
4486 Register Mul3_Lo = UnmergeMul3.getReg(0); in legalizeUnsignedDIV_REM64Impl()
4487 Register Mul3_Hi = UnmergeMul3.getReg(1); in legalizeUnsignedDIV_REM64Impl()
4489 auto Sub1_Hi = B.buildUSube(S32, S1, NumerHi, Mul3_Hi, Sub1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
4494 Register DenomLo = UnmergeDenom.getReg(0); in legalizeUnsignedDIV_REM64Impl()
4495 Register DenomHi = UnmergeDenom.getReg(1); in legalizeUnsignedDIV_REM64Impl()
4512 auto Sub2_Mi = B.buildUSube(S32, S1, Sub1_Mi, DenomHi, Sub1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
4513 auto Sub2_Hi = B.buildUSube(S32, S1, Sub2_Mi, Zero32, Sub2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
4530 auto Sub3_Mi = B.buildUSube(S32, S1, Sub2_Mi, DenomHi, Sub2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
4531 auto Sub3_Hi = B.buildUSube(S32, S1, Sub3_Mi, Zero32, Sub3_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
4560 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
4564 DstRemReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
4568 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
4569 DstRemReg = MI.getOperand(1).getReg(); in legalizeUnsignedDIV_REM()
4577 Register Num = MI.getOperand(FirstSrcOpIdx).getReg(); in legalizeUnsignedDIV_REM()
4578 Register Den = MI.getOperand(FirstSrcOpIdx + 1).getReg(); in legalizeUnsignedDIV_REM()
4579 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeUnsignedDIV_REM()
4598 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeSignedDIV_REM()
4603 Register LHS = MI.getOperand(FirstSrcOpIdx).getReg(); in legalizeSignedDIV_REM()
4604 Register RHS = MI.getOperand(FirstSrcOpIdx + 1).getReg(); in legalizeSignedDIV_REM()
4610 LHS = B.buildAdd(Ty, LHS, LHSign).getReg(0); in legalizeSignedDIV_REM()
4611 RHS = B.buildAdd(Ty, RHS, RHSign).getReg(0); in legalizeSignedDIV_REM()
4613 LHS = B.buildXor(Ty, LHS, LHSign).getReg(0); in legalizeSignedDIV_REM()
4614 RHS = B.buildXor(Ty, RHS, RHSign).getReg(0); in legalizeSignedDIV_REM()
4621 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
4626 DstRemReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
4631 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
4632 DstRemReg = MI.getOperand(1).getReg(); in legalizeSignedDIV_REM()
4645 auto Sign = B.buildXor(Ty, LHSign, RHSign).getReg(0); in legalizeSignedDIV_REM()
4646 auto SignXor = B.buildXor(Ty, TmpDivReg, Sign).getReg(0); in legalizeSignedDIV_REM()
4651 auto Sign = LHSign.getReg(0); // Remainder sign is the same as LHS in legalizeSignedDIV_REM()
4652 auto SignXor = B.buildXor(Ty, TmpRemReg, Sign).getReg(0); in legalizeSignedDIV_REM()
4663 Register Res = MI.getOperand(0).getReg(); in legalizeFastUnsafeFDIV()
4664 Register LHS = MI.getOperand(1).getReg(); in legalizeFastUnsafeFDIV()
4665 Register RHS = MI.getOperand(2).getReg(); in legalizeFastUnsafeFDIV()
4698 .addUse(FNeg.getReg(0)) in legalizeFastUnsafeFDIV()
4725 Register Res = MI.getOperand(0).getReg(); in legalizeFastUnsafeFDIV64()
4726 Register X = MI.getOperand(1).getReg(); in legalizeFastUnsafeFDIV64()
4727 Register Y = MI.getOperand(2).getReg(); in legalizeFastUnsafeFDIV64()
4765 Register Res = MI.getOperand(0).getReg(); in legalizeFDIV16()
4766 Register LHS = MI.getOperand(1).getReg(); in legalizeFDIV16()
4767 Register RHS = MI.getOperand(2).getReg(); in legalizeFDIV16()
4778 .addUse(RHSExt.getReg(0)) in legalizeFDIV16()
4785 .addUse(RDst.getReg(0)) in legalizeFDIV16()
4828 Register Res = MI.getOperand(0).getReg(); in legalizeFDIV32()
4829 Register LHS = MI.getOperand(1).getReg(); in legalizeFDIV32()
4830 Register RHS = MI.getOperand(2).getReg(); in legalizeFDIV32()
4855 .addUse(DenominatorScaled.getReg(0)) in legalizeFDIV32()
4893 .addUse(Fma4.getReg(0)) in legalizeFDIV32()
4894 .addUse(Fma1.getReg(0)) in legalizeFDIV32()
4895 .addUse(Fma3.getReg(0)) in legalizeFDIV32()
4896 .addUse(NumeratorScaled.getReg(1)) in legalizeFDIV32()
4900 .addUse(Fmas.getReg(0)) in legalizeFDIV32()
4915 Register Res = MI.getOperand(0).getReg(); in legalizeFDIV64()
4916 Register LHS = MI.getOperand(1).getReg(); in legalizeFDIV64()
4917 Register RHS = MI.getOperand(2).getReg(); in legalizeFDIV64()
4932 auto NegDivScale0 = B.buildFNeg(S64, DivScale0.getReg(0), Flags); in legalizeFDIV64()
4935 .addUse(DivScale0.getReg(0)) in legalizeFDIV64()
4949 auto Mul = B.buildFMul(S64, DivScale1.getReg(0), Fma3, Flags); in legalizeFDIV64()
4950 auto Fma4 = B.buildFMA(S64, NegDivScale0, Mul, DivScale1.getReg(0), Flags); in legalizeFDIV64()
4964 auto CmpNum = B.buildICmp(ICmpInst::ICMP_EQ, S1, NumUnmerge.getReg(1), in legalizeFDIV64()
4965 Scale1Unmerge.getReg(1)); in legalizeFDIV64()
4966 auto CmpDen = B.buildICmp(ICmpInst::ICMP_EQ, S1, DenUnmerge.getReg(1), in legalizeFDIV64()
4967 Scale0Unmerge.getReg(1)); in legalizeFDIV64()
4968 Scale = B.buildXor(S1, CmpNum, CmpDen).getReg(0); in legalizeFDIV64()
4970 Scale = DivScale1.getReg(1); in legalizeFDIV64()
4974 .addUse(Fma4.getReg(0)) in legalizeFDIV64()
4975 .addUse(Fma3.getReg(0)) in legalizeFDIV64()
4976 .addUse(Mul.getReg(0)) in legalizeFDIV64()
4981 .addUse(Fmas.getReg(0)) in legalizeFDIV64()
4993 Register Res0 = MI.getOperand(0).getReg(); in legalizeFFREXP()
4994 Register Res1 = MI.getOperand(1).getReg(); in legalizeFFREXP()
4995 Register Val = MI.getOperand(2).getReg(); in legalizeFFREXP()
5028 Register Res = MI.getOperand(0).getReg(); in legalizeFDIVFastIntrin()
5029 Register LHS = MI.getOperand(2).getReg(); in legalizeFDIVFastIntrin()
5030 Register RHS = MI.getOperand(3).getReg(); in legalizeFDIVFastIntrin()
5049 .addUse(Mul0.getReg(0)) in legalizeFDIVFastIntrin()
5070 .addUse(Ext.getReg(0)) in legalizeFSQRTF16()
5081 Register Dst = MI.getOperand(0).getReg(); in legalizeFSQRTF32()
5082 Register X = MI.getOperand(1).getReg(); in legalizeFSQRTF32()
5105 .addUse(SqrtX.getReg(0)) in legalizeFSQRTF32()
5124 B.buildSelect(F32, SqrtVPLE0, SqrtSNextDown, SqrtS, Flags).getReg(0); in legalizeFSQRTF32()
5128 B.buildSelect(F32, SqrtVPVSGT0, SqrtSNextUp, SqrtS, Flags).getReg(0); in legalizeFSQRTF32()
5131 B.buildIntrinsic(Intrinsic::amdgcn_rsq, {F32}).addReg(SqrtX.getReg(0)); in legalizeFSQRTF32()
5139 SqrtS = B.buildFMA(F32, SqrtS, SqrtE, SqrtS, Flags).getReg(0); in legalizeFSQRTF32()
5142 SqrtS = B.buildFMA(F32, SqrtD, SqrtH, SqrtS, Flags).getReg(0); in legalizeFSQRTF32()
5149 SqrtS = B.buildSelect(F32, NeedScale, ScaledDown, SqrtS, Flags).getReg(0); in legalizeFSQRTF32()
5185 Register Dst = MI.getOperand(0).getReg(); in legalizeFSQRTF64()
5188 Register X = MI.getOperand(1).getReg(); in legalizeFSQRTF64()
5202 B.buildIntrinsic(Intrinsic::amdgcn_rsq, {F64}).addReg(SqrtX.getReg(0)); in legalizeFSQRTF64()
5245 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeFSQRT()
5267 Register Dst = MI.getOperand(0).getReg(); in legalizeRsqClampIntrinsic()
5268 Register Src = MI.getOperand(2).getReg(); in legalizeRsqClampIntrinsic()
5350 B.buildPtrAdd(DstReg, KernargPtrReg, B.buildConstant(IdxTy, Offset).getReg(0)); in getImplicitArgPtr()
5360 Register Result = MI.getOperand(0).getReg(); in legalizePointerAsRsrcIntrin()
5361 Register Pointer = MI.getOperand(2).getReg(); in legalizePointerAsRsrcIntrin()
5362 Register Stride = MI.getOperand(3).getReg(); in legalizePointerAsRsrcIntrin()
5363 Register NumRecords = MI.getOperand(4).getReg(); in legalizePointerAsRsrcIntrin()
5364 Register Flags = MI.getOperand(5).getReg(); in legalizePointerAsRsrcIntrin()
5370 Register LowHalf = Unmerge.getReg(0); in legalizePointerAsRsrcIntrin()
5371 Register HighHalf = Unmerge.getReg(1); in legalizePointerAsRsrcIntrin()
5392 Register NewHighHalfReg = NewHighHalf.getReg(0); in legalizePointerAsRsrcIntrin()
5407 Register DstReg = MI.getOperand(0).getReg(); in legalizeImplicitArgPtr()
5436 Register DstReg = MI.getOperand(0).getReg(); in legalizeLDSKernelId()
5449 auto Unmerge = B.buildUnmerge(LLT::scalar(32), MI.getOperand(2).getReg()); in legalizeIsAddrSpace()
5450 Register Hi32 = Unmerge.getReg(1); in legalizeIsAddrSpace()
5477 BaseReg = B.buildPtrToInt(MRI.getType(OrigOffset), BaseReg).getReg(0); in splitBufferOffsets()
5496 BaseReg = B.buildConstant(S32, Overflow).getReg(0); in splitBufferOffsets()
5499 BaseReg = B.buildAdd(S32, BaseReg, OverflowVal).getReg(0); in splitBufferOffsets()
5504 BaseReg = B.buildConstant(S32, 0).getReg(0); in splitBufferOffsets()
5524 WideRegs.push_back(B.buildAnyExt(S32, Unmerge.getReg(I)).getReg(0)); in handleD16VData()
5529 .getReg(0); in handleD16VData()
5535 Reg = B.buildBitcast(S32, Reg).getReg(0); in handleD16VData()
5537 PackedRegs.resize(2, B.buildUndef(S32).getReg(0)); in handleD16VData()
5539 .getReg(0); in handleD16VData()
5546 PackedRegs.push_back(Unmerge.getReg(I)); in handleD16VData()
5547 PackedRegs.resize(6, B.buildUndef(S16).getReg(0)); in handleD16VData()
5548 Reg = B.buildBuildVector(LLT::fixed_vector(6, S16), PackedRegs).getReg(0); in handleD16VData()
5549 return B.buildBitcast(LLT::fixed_vector(3, S32), Reg).getReg(0); in handleD16VData()
5554 Reg = B.buildBitcast(LLT::fixed_vector(2, S32), Reg).getReg(0); in handleD16VData()
5557 PackedRegs.push_back(Unmerge.getReg(I)); in handleD16VData()
5558 PackedRegs.resize(4, B.buildUndef(S32).getReg(0)); in handleD16VData()
5560 .getReg(0); in handleD16VData()
5568 .getReg(0); in handleD16VData()
5586 Register AnyExt = B.buildAnyExt(LLT::scalar(32), VData).getReg(0); in fixStoreSourceType()
5605 Register VData = MI.getOperand(1).getReg(); in legalizeBufferStore()
5613 Register RSrc = MI.getOperand(2).getReg(); in legalizeBufferStore()
5628 VIndex = MI.getOperand(3).getReg(); in legalizeBufferStore()
5631 VIndex = B.buildConstant(S32, 0).getReg(0); in legalizeBufferStore()
5634 Register VOffset = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferStore()
5635 Register SOffset = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferStore()
5718 Register Dst = MI.getOperand(0).getReg(); in legalizeBufferLoad()
5725 StatusDst = MI.getOperand(1).getReg(); in legalizeBufferLoad()
5730 Register RSrc = MI.getOperand(2 + OpOffset).getReg(); in legalizeBufferLoad()
5739 VIndex = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferLoad()
5742 VIndex = B.buildConstant(S32, 0).getReg(0); in legalizeBufferLoad()
5745 Register VOffset = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferLoad()
5746 Register SOffset = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferLoad()
5762 Dst = MI.getOperand(0).getReg(); in legalizeBufferLoad()
5838 Repack.push_back(B.buildTrunc(EltTy, Unmerge.getReg(I)).getReg(0)); in legalizeBufferLoad()
5951 Register Dst = MI.getOperand(0).getReg(); in legalizeBufferAtomic()
5954 Register VData = MI.getOperand(2).getReg(); in legalizeBufferAtomic()
5960 CmpVal = MI.getOperand(3).getReg(); in legalizeBufferAtomic()
5965 Register RSrc = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferAtomic()
5972 VIndex = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferAtomic()
5975 VIndex = B.buildConstant(LLT::scalar(32), 0).getReg(0); in legalizeBufferAtomic()
5978 Register VOffset = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferAtomic()
5979 Register SOffset = MI.getOperand(5 + OpOffset).getReg(); in legalizeBufferAtomic()
6023 Register AddrReg = SrcOp.getReg(); in packImage16bitOpsToDwords()
6034 B.buildBuildVector(V2S16, {AddrReg, B.buildUndef(S16).getReg(0)}) in packImage16bitOpsToDwords()
6035 .getReg(0)); in packImage16bitOpsToDwords()
6040 AddrReg = B.buildBitcast(V2S16, AddrReg).getReg(0); in packImage16bitOpsToDwords()
6055 B.buildBuildVector(V2S16, {AddrReg, B.buildUndef(S16).getReg(0)}) in packImage16bitOpsToDwords()
6056 .getReg(0)); in packImage16bitOpsToDwords()
6060 V2S16, {AddrReg, MI.getOperand(ArgOffset + I + 1).getReg()}) in packImage16bitOpsToDwords()
6061 .getReg(0)); in packImage16bitOpsToDwords()
6078 AddrRegs.push_back(SrcOp.getReg()); in convertImageAddrToPacked()
6079 assert(B.getMRI()->getType(SrcOp.getReg()) == S32); in convertImageAddrToPacked()
6087 MI.getOperand(DimIdx).setReg(VAddr.getReg(0)); in convertImageAddrToPacked()
6131 Register VData = MI.getOperand(NumDefs == 0 ? 1 : 0).getReg(); in legalizeImageIntrinsic()
6140 MRI->getType(MI.getOperand(ArgOffset + Intr->GradientStart).getReg()); in legalizeImageIntrinsic()
6142 MRI->getType(MI.getOperand(ArgOffset + Intr->CoordStart).getReg()); in legalizeImageIntrinsic()
6184 Register VData0 = MI.getOperand(2).getReg(); in legalizeImageIntrinsic()
6192 Register VData1 = MI.getOperand(3).getReg(); in legalizeImageIntrinsic()
6196 MI.getOperand(2).setReg(Concat.getReg(0)); in legalizeImageIntrinsic()
6238 PackedRegs[NSAMaxSize - 1] = Concat.getReg(0); in legalizeImageIntrinsic()
6243 PackedRegs[0] = Concat.getReg(0); in legalizeImageIntrinsic()
6255 assert(SrcOp.getReg() != AMDGPU::NoRegister); in legalizeImageIntrinsic()
6313 Register DstReg = MI.getOperand(0).getReg(); in legalizeImageIntrinsic()
6388 Dst1Reg = MI.getOperand(1).getReg(); in legalizeImageIntrinsic()
6446 Reg = B.buildBitcast(V2S16, Reg).getReg(0); in legalizeImageIntrinsic()
6449 Reg = B.buildTrunc(S16, Reg).getReg(0); in legalizeImageIntrinsic()
6456 Register Undef = B.buildUndef(Ty).getReg(0); in legalizeImageIntrinsic()
6480 NewResultReg = B.buildConcatVectors(V4S16, ResultRegs).getReg(0); in legalizeImageIntrinsic()
6505 Register OrigDst = MI.getOperand(0).getReg(); in legalizeSBufferLoad()
6646 B.buildConstant(LLT::scalar(64), Offset).getReg(0)); in legalizeTrapHsaQueuePtr()
6648 Register Temp = B.buildLoad(S64, LoadAddr, *MMO).getReg(0); in legalizeTrapHsaQueuePtr()
6710 Register DstReg = MI.getOperand(0).getReg(); in legalizeBVHIntrinsic()
6711 Register NodePtr = MI.getOperand(2).getReg(); in legalizeBVHIntrinsic()
6712 Register RayExtent = MI.getOperand(3).getReg(); in legalizeBVHIntrinsic()
6713 Register RayOrigin = MI.getOperand(4).getReg(); in legalizeBVHIntrinsic()
6714 Register RayDir = MI.getOperand(5).getReg(); in legalizeBVHIntrinsic()
6715 Register RayInvDir = MI.getOperand(6).getReg(); in legalizeBVHIntrinsic()
6716 Register TDescr = MI.getOperand(7).getReg(); in legalizeBVHIntrinsic()
6762 V3S32, {Unmerge.getReg(0), Unmerge.getReg(1), Unmerge.getReg(2)}); in legalizeBVHIntrinsic()
6763 Ops.push_back(Merged.getReg(0)); in legalizeBVHIntrinsic()
6776 S32, B.buildMergeLikeInstr(V2S16, {UnmergeRayInvDir.getReg(0), in legalizeBVHIntrinsic()
6777 UnmergeRayDir.getReg(0)})) in legalizeBVHIntrinsic()
6778 .getReg(0), in legalizeBVHIntrinsic()
6780 S32, B.buildMergeLikeInstr(V2S16, {UnmergeRayInvDir.getReg(1), in legalizeBVHIntrinsic()
6781 UnmergeRayDir.getReg(1)})) in legalizeBVHIntrinsic()
6782 .getReg(0), in legalizeBVHIntrinsic()
6784 S32, B.buildMergeLikeInstr(V2S16, {UnmergeRayInvDir.getReg(2), in legalizeBVHIntrinsic()
6785 UnmergeRayDir.getReg(2)})) in legalizeBVHIntrinsic()
6786 .getReg(0)}); in legalizeBVHIntrinsic()
6787 Ops.push_back(MergedDir.getReg(0)); in legalizeBVHIntrinsic()
6795 Ops.push_back(Unmerge.getReg(0)); in legalizeBVHIntrinsic()
6796 Ops.push_back(Unmerge.getReg(1)); in legalizeBVHIntrinsic()
6804 Ops.push_back(Unmerge.getReg(0)); in legalizeBVHIntrinsic()
6805 Ops.push_back(Unmerge.getReg(1)); in legalizeBVHIntrinsic()
6806 Ops.push_back(Unmerge.getReg(2)); in legalizeBVHIntrinsic()
6817 {UnmergeRayDir.getReg(0), UnmergeRayDir.getReg(1)}); in legalizeBVHIntrinsic()
6819 R2, {UnmergeRayDir.getReg(2), UnmergeRayInvDir.getReg(0)}); in legalizeBVHIntrinsic()
6821 R3, {UnmergeRayInvDir.getReg(1), UnmergeRayInvDir.getReg(2)}); in legalizeBVHIntrinsic()
6834 Register MergedOps = B.buildMergeLikeInstr(OpTy, Ops).getReg(0); in legalizeBVHIntrinsic()
6868 .addDef(MI.getOperand(0).getReg()) in legalizeFPTruncRound()
6869 .addUse(MI.getOperand(1).getReg()); in legalizeFPTruncRound()
6880 Register DstReg = MI.getOperand(0).getReg(); in legalizeStackSave()
6892 Register DstReg = MI.getOperand(0).getReg(); in legalizeWaveID()
6919 Register Def = MI.getOperand(1).getReg(); in legalizeIntrinsic()
6920 Register Use = MI.getOperand(3).getReg(); in legalizeIntrinsic()
6968 Register Reg = MI.getOperand(2).getReg(); in legalizeIntrinsic()
6996 B.buildConstant(MI.getOperand(0).getReg(), 0); in legalizeIntrinsic()
7197 Register Index = MI.getOperand(5).getReg(); in legalizeIntrinsic()
7200 MI.getOperand(5).setReg(B.buildAnyExt(S32, Index).getReg(0)); in legalizeIntrinsic()
7206 Register Index = MI.getOperand(7).getReg(); in legalizeIntrinsic()
7209 MI.getOperand(7).setReg(B.buildAnyExt(S32, Index).getReg(0)); in legalizeIntrinsic()