2287     Register LoReg = MRI->createVirtualRegister(DstRC);  in selectG_TRUNC()  local
2289     BuildMI(*MBB, I, DL, TII.get(AMDGPU::COPY), LoReg)  in selectG_TRUNC()
2305         .addReg(LoReg, RegState::Implicit);  in selectG_TRUNC()
2329         .addReg(LoReg)  in selectG_TRUNC()
2636     Register LoReg = MRI->createVirtualRegister(RC);  in selectG_CONSTANT()  local
2639     BuildMI(*BB, &I, DL, TII.get(Opcode), LoReg)  in selectG_CONSTANT()
2646       .addReg(LoReg)  in selectG_CONSTANT()
2691   Register LoReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass);  in selectG_FNEG()  local
2696   BuildMI(*BB, &MI, DL, TII.get(AMDGPU::COPY), LoReg)  in selectG_FNEG()
2710     .addReg(LoReg)  in selectG_FNEG()
2729   Register LoReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass);  in selectG_FABS()  local
2738   BuildMI(*BB, &MI, DL, TII.get(AMDGPU::COPY), LoReg)  in selectG_FABS()
2752     .addReg(LoReg)  in selectG_FABS()
3013   Register LoReg = MRI->createVirtualRegister(&RegRC);  in selectG_PTRMASK()  local
3016   BuildMI(*BB, &I, DL, TII.get(AMDGPU::COPY), LoReg)  in selectG_PTRMASK()
3025     MaskedLo = LoReg;  in selectG_PTRMASK()
3034       .addReg(LoReg)  in selectG_PTRMASK()