1437     Register HiReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass);  in selectBallot()  local
1438     BuildMI(*BB, &I, DL, TII.get(AMDGPU::S_MOV_B32), HiReg).addImm(0);  in selectBallot()
1442         .addReg(HiReg)  in selectBallot()
2288     Register HiReg = MRI->createVirtualRegister(DstRC);  in selectG_TRUNC()  local
2291     BuildMI(*MBB, I, DL, TII.get(AMDGPU::COPY), HiReg)  in selectG_TRUNC()
2300         .addReg(HiReg)                         // $src0  in selectG_TRUNC()
2314           .addReg(HiReg);  in selectG_TRUNC()
2317           .addReg(HiReg)  in selectG_TRUNC()
2478       Register HiReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass);  in selectG_SZA_EXT()  local
2481         BuildMI(MBB, I, DL, TII.get(AMDGPU::S_ASHR_I32), HiReg)  in selectG_SZA_EXT()
2486         BuildMI(MBB, I, DL, TII.get(AMDGPU::S_MOV_B32), HiReg)  in selectG_SZA_EXT()
2492         .addReg(HiReg)  in selectG_SZA_EXT()
2637     Register HiReg = MRI->createVirtualRegister(RC);  in selectG_CONSTANT()  local
2642     BuildMI(*BB, &I, DL, TII.get(Opcode), HiReg)  in selectG_CONSTANT()
2648       .addReg(HiReg)  in selectG_CONSTANT()
2692   Register HiReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass);  in selectG_FNEG()  local
2698   BuildMI(*BB, &MI, DL, TII.get(AMDGPU::COPY), HiReg)  in selectG_FNEG()
2706     .addReg(HiReg)  in selectG_FNEG()
2730   Register HiReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass);  in selectG_FABS()  local
2740   BuildMI(*BB, &MI, DL, TII.get(AMDGPU::COPY), HiReg)  in selectG_FABS()
2748     .addReg(HiReg)  in selectG_FABS()
3012   Register HiReg = MRI->createVirtualRegister(&RegRC);  in selectG_PTRMASK()  local
3018   BuildMI(*BB, &I, DL, TII.get(AMDGPU::COPY), HiReg)  in selectG_PTRMASK()
3040     MaskedHi = HiReg;  in selectG_PTRMASK()
3048       .addReg(HiReg)  in selectG_PTRMASK()