Lines Matching refs:AddrDef
3379 auto AddrDef = getDefSrcRegIgnoringCopies(Addr, *MRI); in selectGlobalLoadLds() local
3380 if (isSGPR(AddrDef->Reg)) { in selectGlobalLoadLds()
3381 Addr = AddrDef->Reg; in selectGlobalLoadLds()
3382 } else if (AddrDef->MI->getOpcode() == AMDGPU::G_PTR_ADD) { in selectGlobalLoadLds()
3384 getSrcRegIgnoringCopies(AddrDef->MI->getOperand(1).getReg(), *MRI); in selectGlobalLoadLds()
3386 Register PtrBaseOffset = AddrDef->MI->getOperand(2).getReg(); in selectGlobalLoadLds()
4463 auto AddrDef = getDefSrcRegIgnoringCopies(Addr, *MRI); in selectGlobalSAddr() local
4464 if (AddrDef->MI->getOpcode() == AMDGPU::G_PTR_ADD) { in selectGlobalSAddr()
4467 getSrcRegIgnoringCopies(AddrDef->MI->getOperand(1).getReg(), *MRI); in selectGlobalSAddr()
4470 Register PtrBaseOffset = AddrDef->MI->getOperand(2).getReg(); in selectGlobalSAddr()
4490 if (AddrDef->MI->getOpcode() == AMDGPU::G_IMPLICIT_DEF || in selectGlobalSAddr()
4491 AddrDef->MI->getOpcode() == AMDGPU::G_CONSTANT || !isSGPR(AddrDef->Reg)) in selectGlobalSAddr()
4504 [=](MachineInstrBuilder &MIB) { MIB.addReg(AddrDef->Reg); }, // saddr in selectGlobalSAddr()
4528 auto AddrDef = getDefSrcRegIgnoringCopies(Addr, *MRI); in selectScratchSAddr() local
4529 if (AddrDef->MI->getOpcode() == AMDGPU::G_FRAME_INDEX) { in selectScratchSAddr()
4530 int FI = AddrDef->MI->getOperand(1).getIndex(); in selectScratchSAddr()
4537 Register SAddr = AddrDef->Reg; in selectScratchSAddr()
4539 if (AddrDef->MI->getOpcode() == AMDGPU::G_PTR_ADD) { in selectScratchSAddr()
4540 Register LHS = AddrDef->MI->getOperand(1).getReg(); in selectScratchSAddr()
4541 Register RHS = AddrDef->MI->getOperand(2).getReg(); in selectScratchSAddr()
4605 auto AddrDef = getDefSrcRegIgnoringCopies(Addr, *MRI); in selectScratchSVAddr() local
4606 if (AddrDef->MI->getOpcode() != AMDGPU::G_PTR_ADD) in selectScratchSVAddr()
4609 Register RHS = AddrDef->MI->getOperand(2).getReg(); in selectScratchSVAddr()
4613 Register LHS = AddrDef->MI->getOperand(1).getReg(); in selectScratchSVAddr()