49 AMDGPUInstructionSelector::AMDGPUInstructionSelector(  in AMDGPUInstructionSelector()  function in AMDGPUInstructionSelector
64 const char *AMDGPUInstructionSelector::getName() { return DEBUG_TYPE; }  in getName()
66 void AMDGPUInstructionSelector::setupMF(MachineFunction &MF, GISelKnownBits *KB,  in setupMF()
82 bool AMDGPUInstructionSelector::isVCC(Register Reg,  in isVCC()
104 bool AMDGPUInstructionSelector::constrainCopyLikeIntrin(MachineInstr &MI,  in constrainCopyLikeIntrin()
128 bool AMDGPUInstructionSelector::selectCOPY(MachineInstr &I) const {  in selectCOPY()
210 bool AMDGPUInstructionSelector::selectPHI(MachineInstr &I) const {  in selectPHI()
249 AMDGPUInstructionSelector::getSubOperand64(MachineOperand &MO,  in getSubOperand64()
296 bool AMDGPUInstructionSelector::selectG_AND_OR_XOR(MachineInstr &I) const {  in selectG_AND_OR_XOR()
317 bool AMDGPUInstructionSelector::selectG_ADD_SUB(MachineInstr &I) const {  in selectG_ADD_SUB()
420 bool AMDGPUInstructionSelector::selectG_UADDO_USUBO_UADDE_USUBE(  in selectG_UADDO_USUBO_UADDE_USUBE()
480 bool AMDGPUInstructionSelector::selectG_AMDGPU_MAD_64_32(  in selectG_AMDGPU_MAD_64_32()
499 bool AMDGPUInstructionSelector::selectG_EXTRACT(MachineInstr &I) const {  in selectG_EXTRACT()
544 bool AMDGPUInstructionSelector::selectG_MERGE_VALUES(MachineInstr &MI) const {  in selectG_MERGE_VALUES()
583 bool AMDGPUInstructionSelector::selectG_UNMERGE_VALUES(MachineInstr &MI) const {  in selectG_UNMERGE_VALUES()
628 bool AMDGPUInstructionSelector::selectG_BUILD_VECTOR(MachineInstr &MI) const {  in selectG_BUILD_VECTOR()
777 bool AMDGPUInstructionSelector::selectG_PTR_ADD(MachineInstr &I) const {  in selectG_PTR_ADD()
781 bool AMDGPUInstructionSelector::selectG_IMPLICIT_DEF(MachineInstr &I) const {  in selectG_IMPLICIT_DEF()
796 bool AMDGPUInstructionSelector::selectG_INSERT(MachineInstr &I) const {  in selectG_INSERT()
855 bool AMDGPUInstructionSelector::selectG_SBFX_UBFX(MachineInstr &MI) const {  in selectG_SBFX_UBFX()
879 bool AMDGPUInstructionSelector::selectInterpP1F16(MachineInstr &MI) const {  in selectInterpP1F16()
929 bool AMDGPUInstructionSelector::selectWritelane(MachineInstr &MI) const {  in selectWritelane()
983 bool AMDGPUInstructionSelector::selectDivScale(MachineInstr &MI) const {  in selectDivScale()
1022 bool AMDGPUInstructionSelector::selectG_INTRINSIC(MachineInstr &I) const {  in selectG_INTRINSIC()
1198 int AMDGPUInstructionSelector::getS_CMPOpcode(CmpInst::Predicate P,  in getS_CMPOpcode()
1310 bool AMDGPUInstructionSelector::selectG_ICMP_or_FCMP(MachineInstr &I) const {  in selectG_ICMP_or_FCMP()
1355 bool AMDGPUInstructionSelector::selectIntrinsicCmp(MachineInstr &I) const {  in selectIntrinsicCmp()
1413 bool AMDGPUInstructionSelector::selectBallot(MachineInstr &I) const {  in selectBallot()
1462 bool AMDGPUInstructionSelector::selectInverseBallot(MachineInstr &I) const {  in selectInverseBallot()
1473 bool AMDGPUInstructionSelector::selectRelocConstant(MachineInstr &I) const {  in selectRelocConstant()
1497 bool AMDGPUInstructionSelector::selectGroupStaticSize(MachineInstr &I) const {  in selectGroupStaticSize()
1524 bool AMDGPUInstructionSelector::selectReturnAddress(MachineInstr &I) const {  in selectReturnAddress()
1562 bool AMDGPUInstructionSelector::selectEndCfIntrinsic(MachineInstr &MI) const {  in selectEndCfIntrinsic()
1577 bool AMDGPUInstructionSelector::selectDSOrderedIntrinsic(  in selectDSOrderedIntrinsic()
1660 bool AMDGPUInstructionSelector::selectDSGWSIntrinsic(MachineInstr &MI,  in selectDSGWSIntrinsic()
1751 bool AMDGPUInstructionSelector::selectDSAppendConsume(MachineInstr &MI,  in selectDSAppendConsume()
1783 bool AMDGPUInstructionSelector::selectSBarrier(MachineInstr &MI) const {  in selectSBarrier()
1823 bool AMDGPUInstructionSelector::selectImageIntrinsic(  in selectImageIntrinsic()
2095 bool AMDGPUInstructionSelector::selectDSBvhStackIntrinsic(  in selectDSBvhStackIntrinsic()
2120 bool AMDGPUInstructionSelector::selectG_INTRINSIC_W_SIDE_EFFECTS(  in selectG_INTRINSIC_W_SIDE_EFFECTS()
2174 bool AMDGPUInstructionSelector::selectG_SELECT(MachineInstr &I) const {  in selectG_SELECT()
2246 bool AMDGPUInstructionSelector::selectG_TRUNC(MachineInstr &I) const {  in selectG_TRUNC()
2380 const RegisterBank *AMDGPUInstructionSelector::getArtifactRegBank(  in getArtifactRegBank()
2393 bool AMDGPUInstructionSelector::selectG_SZA_EXT(MachineInstr &I) const {  in selectG_SZA_EXT()
2554 bool AMDGPUInstructionSelector::selectG_FPEXT(MachineInstr &I) const {  in selectG_FPEXT()
2579 bool AMDGPUInstructionSelector::selectG_CONSTANT(MachineInstr &I) const {  in selectG_CONSTANT()
2662 bool AMDGPUInstructionSelector::selectG_FNEG(MachineInstr &MI) const {  in selectG_FNEG()
2719 bool AMDGPUInstructionSelector::selectG_FABS(MachineInstr &MI) const {  in selectG_FABS()
2765 void AMDGPUInstructionSelector::getAddrModeInfo(const MachineInstr &Load,  in getAddrModeInfo()
2801 bool AMDGPUInstructionSelector::isSGPR(Register Reg) const {  in isSGPR()
2805 bool AMDGPUInstructionSelector::isInstrUniform(const MachineInstr &MI) const {  in isInstrUniform()
2831 bool AMDGPUInstructionSelector::hasVgprParts(ArrayRef<GEPInfo> AddrInfo) const {  in hasVgprParts()
2839 void AMDGPUInstructionSelector::initM0(MachineInstr &I) const {  in initM0()
2852 bool AMDGPUInstructionSelector::selectG_LOAD_STORE_ATOMICRMW(  in selectG_LOAD_STORE_ATOMICRMW()
2879 bool AMDGPUInstructionSelector::selectG_BRCOND(MachineInstr &I) const {  in selectG_BRCOND()
2936 bool AMDGPUInstructionSelector::selectG_GLOBAL_VALUE(  in selectG_GLOBAL_VALUE()
2949 bool AMDGPUInstructionSelector::selectG_PTRMASK(MachineInstr &I) const {  in selectG_PTRMASK()
3088 bool AMDGPUInstructionSelector::selectG_EXTRACT_VECTOR_ELT(  in selectG_EXTRACT_VECTOR_ELT()
3165 bool AMDGPUInstructionSelector::selectG_INSERT_VECTOR_ELT(  in selectG_INSERT_VECTOR_ELT()
3238 bool AMDGPUInstructionSelector::selectBufferLoadLds(MachineInstr &MI) const {  in selectBufferLoadLds()
3351 bool AMDGPUInstructionSelector::selectGlobalLoadLds(MachineInstr &MI) const{  in selectGlobalLoadLds()
3433 bool AMDGPUInstructionSelector::selectBVHIntrinsic(MachineInstr &MI) const{  in selectBVHIntrinsic()
3440 bool AMDGPUInstructionSelector::selectSMFMACIntrin(MachineInstr &MI) const {  in selectSMFMACIntrin()
3499 bool AMDGPUInstructionSelector::selectWaveAddress(MachineInstr &MI) const {  in selectWaveAddress()
3527 bool AMDGPUInstructionSelector::selectStackRestore(MachineInstr &MI) const {  in selectStackRestore()
3554 bool AMDGPUInstructionSelector::select(MachineInstr &I) {  in select()
3706 AMDGPUInstructionSelector::selectVCSRC(MachineOperand &Root) const {  in selectVCSRC()
3714 AMDGPUInstructionSelector::selectVOP3ModsImpl(MachineOperand &Root,  in selectVOP3ModsImpl()
3747 Register AMDGPUInstructionSelector::copyToVGPRIfSrcFolded(  in copyToVGPRIfSrcFolded()
3770 AMDGPUInstructionSelector::selectVSRC0(MachineOperand &Root) const {  in selectVSRC0()
3777 AMDGPUInstructionSelector::selectVOP3Mods0(MachineOperand &Root) const {  in selectVOP3Mods0()
3793 AMDGPUInstructionSelector::selectVOP3BMods0(MachineOperand &Root) const {  in selectVOP3BMods0()
3811 AMDGPUInstructionSelector::selectVOP3OMods(MachineOperand &Root) const {  in selectVOP3OMods()
3820 AMDGPUInstructionSelector::selectVOP3Mods(MachineOperand &Root) const {  in selectVOP3Mods()
3834 AMDGPUInstructionSelector::selectVOP3ModsNonCanonicalizing(  in selectVOP3ModsNonCanonicalizing()
3849 AMDGPUInstructionSelector::selectVOP3BMods(MachineOperand &Root) const {  in selectVOP3BMods()
3864 AMDGPUInstructionSelector::selectVOP3NoMods(MachineOperand &Root) const {  in selectVOP3NoMods()
3875 AMDGPUInstructionSelector::selectVOP3PModsImpl(  in selectVOP3PModsImpl()
3901 AMDGPUInstructionSelector::selectVOP3PMods(MachineOperand &Root) const {  in selectVOP3PMods()
3916 AMDGPUInstructionSelector::selectVOP3PModsDOT(MachineOperand &Root) const {  in selectVOP3PModsDOT()
3931 AMDGPUInstructionSelector::selectVOP3PModsNeg(MachineOperand &Root) const {  in selectVOP3PModsNeg()
3946 AMDGPUInstructionSelector::selectWMMAOpSelVOP3PMods(  in selectWMMAOpSelVOP3PMods()
4018 AMDGPUInstructionSelector::selectWMMAModsF32NegAbs(MachineOperand &Root) const {  in selectWMMAModsF32NegAbs()
4048 AMDGPUInstructionSelector::selectWMMAModsF16Neg(MachineOperand &Root) const {  in selectWMMAModsF16Neg()
4074 AMDGPUInstructionSelector::selectWMMAModsF16NegAbs(MachineOperand &Root) const {  in selectWMMAModsF16NegAbs()
4105 AMDGPUInstructionSelector::selectWMMAVISrc(MachineOperand &Root) const {  in selectWMMAVISrc()
4130 AMDGPUInstructionSelector::selectSWMMACIndex8(MachineOperand &Root) const {  in selectSWMMACIndex8()
4151 AMDGPUInstructionSelector::selectSWMMACIndex16(MachineOperand &Root) const {  in selectSWMMACIndex16()
4173 AMDGPUInstructionSelector::selectVOP3OpSelMods(MachineOperand &Root) const {  in selectVOP3OpSelMods()
4186 AMDGPUInstructionSelector::selectVINTERPMods(MachineOperand &Root) const {  in selectVINTERPMods()
4204 AMDGPUInstructionSelector::selectVINTERPModsHi(MachineOperand &Root) const {  in selectVINTERPModsHi()
4221 bool AMDGPUInstructionSelector::selectSmrdOffset(MachineOperand &Root,  in selectSmrdOffset()
4289 AMDGPUInstructionSelector::selectSmrdImm(MachineOperand &Root) const {  in selectSmrdImm()
4300 AMDGPUInstructionSelector::selectSmrdImm32(MachineOperand &Root) const {  in selectSmrdImm32()
4321 AMDGPUInstructionSelector::selectSmrdSgpr(MachineOperand &Root) const {  in selectSmrdSgpr()
4331 AMDGPUInstructionSelector::selectSmrdSgprImm(MachineOperand &Root) const {  in selectSmrdSgprImm()
4343 AMDGPUInstructionSelector::selectFlatOffsetImpl(MachineOperand &Root,  in selectFlatOffsetImpl()
4369 AMDGPUInstructionSelector::selectFlatOffset(MachineOperand &Root) const {  in selectFlatOffset()
4379 AMDGPUInstructionSelector::selectGlobalOffset(MachineOperand &Root) const {  in selectGlobalOffset()
4389 AMDGPUInstructionSelector::selectScratchOffset(MachineOperand &Root) const {  in selectScratchOffset()
4400 AMDGPUInstructionSelector::selectGlobalSAddr(MachineOperand &Root) const {  in selectGlobalSAddr()
4511 AMDGPUInstructionSelector::selectScratchSAddr(MachineOperand &Root) const {  in selectScratchSAddr()
4570 bool AMDGPUInstructionSelector::checkFlatScratchSVSSwizzleBug(  in checkFlatScratchSVSSwizzleBug()
4588 AMDGPUInstructionSelector::selectScratchSVAddr(MachineOperand &Root) const {  in selectScratchSVAddr()
4647 AMDGPUInstructionSelector::selectMUBUFScratchOffen(MachineOperand &Root) const {  in selectMUBUFScratchOffen()
4726 bool AMDGPUInstructionSelector::isDSOffsetLegal(Register Base,  in isDSOffsetLegal()
4739 bool AMDGPUInstructionSelector::isDSOffset2Legal(Register Base, int64_t Offset0,  in isDSOffset2Legal()
4765 bool AMDGPUInstructionSelector::isFlatScratchBaseLegal(Register Addr) const {  in isFlatScratchBaseLegal()
4796 bool AMDGPUInstructionSelector::isFlatScratchBaseLegalSV(Register Addr) const {  in isFlatScratchBaseLegalSV()
4814 bool AMDGPUInstructionSelector::isFlatScratchBaseLegalSVImm(  in isFlatScratchBaseLegalSVImm()
4844 bool AMDGPUInstructionSelector::isUnneededShiftMask(const MachineInstr &MI,  in isUnneededShiftMask()
4861 AMDGPUInstructionSelector::selectMUBUFScratchOffset(  in selectMUBUFScratchOffset()
4924 AMDGPUInstructionSelector::selectDS1Addr1OffsetImpl(MachineOperand &Root) const {  in selectDS1Addr1OffsetImpl()
4954 AMDGPUInstructionSelector::selectDS1Addr1Offset(MachineOperand &Root) const {  in selectDS1Addr1Offset()
4965 AMDGPUInstructionSelector::selectDS64Bit4ByteAligned(MachineOperand &Root) const {  in selectDS64Bit4ByteAligned()
4970 AMDGPUInstructionSelector::selectDS128Bit8ByteAligned(MachineOperand &Root) const {  in selectDS128Bit8ByteAligned()
4975 AMDGPUInstructionSelector::selectDSReadWrite2(MachineOperand &Root,  in selectDSReadWrite2()
4988 AMDGPUInstructionSelector::selectDSReadWrite2Impl(MachineOperand &Root,  in selectDSReadWrite2Impl()
5024 AMDGPUInstructionSelector::getPtrBaseWithConstantOffset(  in getPtrBaseWithConstantOffset()
5105 AMDGPUInstructionSelector::MUBUFAddressData
5106 AMDGPUInstructionSelector::parseMUBUFAddress(Register Src) const {  in parseMUBUFAddress()
5137 bool AMDGPUInstructionSelector::shouldUseAddr64(MUBUFAddressData Addr) const {  in shouldUseAddr64()
5150 void AMDGPUInstructionSelector::splitIllegalMUBUFOffset(  in splitIllegalMUBUFOffset()
5163 bool AMDGPUInstructionSelector::selectMUBUFAddr64Impl(  in selectMUBUFAddr64Impl()
5214 bool AMDGPUInstructionSelector::selectMUBUFOffsetImpl(  in selectMUBUFOffsetImpl()
5240 AMDGPUInstructionSelector::selectMUBUFAddr64(MachineOperand &Root) const {  in selectMUBUFAddr64()
5276 AMDGPUInstructionSelector::selectMUBUFOffset(MachineOperand &Root) const {  in selectMUBUFOffset()
5304 AMDGPUInstructionSelector::selectBUFSOffset(MachineOperand &Root) const {  in selectBUFSOffset()
5325 AMDGPUInstructionSelector::selectSMRDBufferImm(MachineOperand &Root) const {  in selectSMRDBufferImm()
5339 AMDGPUInstructionSelector::selectSMRDBufferImm32(MachineOperand &Root) const {  in selectSMRDBufferImm32()
5355 AMDGPUInstructionSelector::selectSMRDBufferSgprImm(MachineOperand &Root) const {  in selectSMRDBufferSgprImm()
5429 AMDGPUInstructionSelector::selectVOP3PMadMixModsImpl(MachineOperand &Root,  in selectVOP3PMadMixModsImpl()
5494 AMDGPUInstructionSelector::selectVOP3PMadMixModsExt(  in selectVOP3PMadMixModsExt()
5510 AMDGPUInstructionSelector::selectVOP3PMadMixMods(MachineOperand &Root) const {  in selectVOP3PMadMixMods()
5522 bool AMDGPUInstructionSelector::selectSBarrierSignalIsfirst(  in selectSBarrierSignalIsfirst()
5578 bool AMDGPUInstructionSelector::selectNamedBarrierInst(  in selectNamedBarrierInst()
5639 bool AMDGPUInstructionSelector::selectSBarrierLeave(MachineInstr &I) const {  in selectSBarrierLeave()
5652 void AMDGPUInstructionSelector::renderTruncImm32(MachineInstrBuilder &MIB,  in renderTruncImm32()
5660 void AMDGPUInstructionSelector::renderNegateImm(MachineInstrBuilder &MIB,  in renderNegateImm()
5668 void AMDGPUInstructionSelector::renderBitcastImm(MachineInstrBuilder &MIB,  in renderBitcastImm()
5682 void AMDGPUInstructionSelector::renderPopcntImm(MachineInstrBuilder &MIB,  in renderPopcntImm()
5692 void AMDGPUInstructionSelector::renderTruncTImm(MachineInstrBuilder &MIB,  in renderTruncTImm()
5698 void AMDGPUInstructionSelector::renderOpSelTImm(MachineInstrBuilder &MIB,  in renderOpSelTImm()
5705 void AMDGPUInstructionSelector::renderExtractCPol(MachineInstrBuilder &MIB,  in renderExtractCPol()
5714 void AMDGPUInstructionSelector::renderExtractSWZ(MachineInstrBuilder &MIB,  in renderExtractSWZ()
5724 void AMDGPUInstructionSelector::renderExtractCpolSetGLC(  in renderExtractCpolSetGLC()
5733 void AMDGPUInstructionSelector::renderFrameIndex(MachineInstrBuilder &MIB,  in renderFrameIndex()
5739 void AMDGPUInstructionSelector::renderFPPow2ToExponent(MachineInstrBuilder &MIB,  in renderFPPow2ToExponent()
5748 bool AMDGPUInstructionSelector::isInlineImmediate16(int64_t Imm) const {  in isInlineImmediate16()
5752 bool AMDGPUInstructionSelector::isInlineImmediate32(int64_t Imm) const {  in isInlineImmediate32()
5756 bool AMDGPUInstructionSelector::isInlineImmediate64(int64_t Imm) const {  in isInlineImmediate64()
5760 bool AMDGPUInstructionSelector::isInlineImmediate(const APFloat &Imm) const {  in isInlineImmediate()