Lines Matching refs:TII
91 const SIInstrInfo *TII; member in __anon114cba190111::InstructionRule
104 InstructionRule(const SIInstrInfo *TII, unsigned SGID, in InstructionRule() argument
106 : TII(TII), SGID(SGID) { in InstructionRule()
143 const SIInstrInfo *TII; member in __anon114cba190111::SchedGroup
236 ScheduleDAGInstrs *DAG, const SIInstrInfo *TII) in SchedGroup() argument
237 : SGMask(SGMask), MaxSize(MaxSize), TII(TII), DAG(DAG) { in SchedGroup()
242 ScheduleDAGInstrs *DAG, const SIInstrInfo *TII) in SchedGroup() argument
243 : SGMask(SGMask), MaxSize(MaxSize), SyncID(SyncID), TII(TII), DAG(DAG) { in SchedGroup()
848 const SIInstrInfo *TII; member in __anon114cba190111::IGLPStrategy
862 IGLPStrategy(ScheduleDAGInstrs *DAG, const SIInstrInfo *TII) in IGLPStrategy() argument
863 : DAG(DAG), TII(TII) {} in IGLPStrategy()
878 MFMASmallGemmOpt(ScheduleDAGInstrs *DAG, const SIInstrInfo *TII) in MFMASmallGemmOpt() argument
879 : IGLPStrategy(DAG, TII) { in MFMASmallGemmOpt()
891 if (TII->isMFMAorWMMA(I)) in applyIGLPStrategy()
898 SchedGroupMask::DS, 2, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
902 SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
919 if (TII->isMFMAorWMMA(*Elt.getInstr())) { in apply()
937 EnablesInitialMFMA(const SIInstrInfo *TII, unsigned SGID, in EnablesInitialMFMA() argument
939 : InstructionRule(TII, SGID, NeedsCache) {} in EnablesInitialMFMA()
956 if (TII->isDS(*SuccUnit->getInstr()) && in apply()
976 IsPermForDSW(const SIInstrInfo *TII, unsigned SGID, bool NeedsCache = false) in IsPermForDSW() argument
977 : InstructionRule(TII, SGID, NeedsCache) {} in IsPermForDSW()
1007 IsSuccOfPrevGroup(const SIInstrInfo *TII, unsigned SGID, in IsSuccOfPrevGroup() argument
1009 : InstructionRule(TII, SGID, NeedsCache) {} in IsSuccOfPrevGroup()
1025 auto TRI = TII->getRegisterInfo(); in apply()
1035 assert(TII->isVMEM(*MI) && MI->mayLoad()); in apply()
1045 VMEMSize(const SIInstrInfo *TII, unsigned SGID, bool NeedsCache = false) in VMEMSize() argument
1046 : InstructionRule(TII, SGID, NeedsCache) {} in VMEMSize()
1095 SharesPredWithPrevNthGroup(unsigned Distance, const SIInstrInfo *TII, in SharesPredWithPrevNthGroup() argument
1097 : InstructionRule(TII, SGID, NeedsCache), Distance(Distance) {} in SharesPredWithPrevNthGroup()
1108 MFMASmallGemmSingleWaveOpt(ScheduleDAGInstrs *DAG, const SIInstrInfo *TII) in MFMASmallGemmSingleWaveOpt() argument
1109 : IGLPStrategy(DAG, TII) { in MFMASmallGemmSingleWaveOpt()
1131 if (TII->isMFMAorWMMA(*I)) in applyIGLPStrategy()
1133 else if (TII->isDS(*I)) { in applyIGLPStrategy()
1174 if (!TII->isVMEM(*MI) || !MI->mayLoad()) in applyIGLPStrategy()
1211 SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1215 SchedGroupMask::VALU, 2, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1227 SchedGroupMask::DS_READ, 4, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1228 SG->addRule(std::make_shared<EnablesInitialMFMA>(TII, SG->getSGID(), true)); in applyIGLPStrategy()
1232 SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1238 SchedGroupMask::DS_READ, 1, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1242 SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1251 SchedGroupMask::VALU, 4, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1252 SG->addRule(std::make_shared<IsPermForDSW>(TII, SG->getSGID(), true)); in applyIGLPStrategy()
1256 SchedGroupMask::DS_WRITE, 1, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1257 SG->addRule(std::make_shared<IsSuccOfPrevGroup>(TII, SG->getSGID(), false)); in applyIGLPStrategy()
1261 SchedGroupMask::VMEM_READ, 4, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1263 1, TII, SG->getSGID(), true)); in applyIGLPStrategy()
1264 SG->addRule(std::make_shared<VMEMSize>(TII, SG->getSGID(), false)); in applyIGLPStrategy()
1268 SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1272 SchedGroupMask::VMEM_READ, 4, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1274 3, TII, SG->getSGID(), true)); in applyIGLPStrategy()
1275 SG->addRule(std::make_shared<VMEMSize>(TII, SG->getSGID(), false)); in applyIGLPStrategy()
1279 SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1288 SchedGroupMask::DS_WRITE, 1, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1292 SchedGroupMask::VMEM_READ, 4, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1293 SG->addRule(std::make_shared<VMEMSize>(TII, SG->getSGID(), false)); in applyIGLPStrategy()
1297 SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1308 SchedGroupMask::VALU, 4, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1309 SG->addRule(std::make_shared<IsPermForDSW>(TII, SG->getSGID(), true)); in applyIGLPStrategy()
1313 SchedGroupMask::DS_WRITE, 1, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1314 SG->addRule(std::make_shared<IsSuccOfPrevGroup>(TII, SG->getSGID(), false)); in applyIGLPStrategy()
1318 SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1322 SchedGroupMask::VALU, 4, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1323 SG->addRule(std::make_shared<IsPermForDSW>(TII, SG->getSGID(), true)); in applyIGLPStrategy()
1327 SchedGroupMask::DS_WRITE, 1, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1328 SG->addRule(std::make_shared<IsSuccOfPrevGroup>(TII, SG->getSGID(), false)); in applyIGLPStrategy()
1332 SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1336 SchedGroupMask::VMEM_READ, 4, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1338 2, TII, SG->getSGID(), true)); in applyIGLPStrategy()
1339 SG->addRule(std::make_shared<VMEMSize>(TII, SG->getSGID(), false)); in applyIGLPStrategy()
1343 SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1347 SchedGroupMask::VMEM_READ, 4, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1349 4, TII, SG->getSGID(), true)); in applyIGLPStrategy()
1350 SG->addRule(std::make_shared<VMEMSize>(TII, SG->getSGID(), false)); in applyIGLPStrategy()
1354 SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII); in applyIGLPStrategy()
1361 const SIInstrInfo *TII) { in createIGLPStrategy() argument
1364 return std::make_unique<MFMASmallGemmOpt>(DAG, TII); in createIGLPStrategy()
1366 return std::make_unique<MFMASmallGemmSingleWaveOpt>(DAG, TII); in createIGLPStrategy()
1374 const SIInstrInfo *TII; member in __anon114cba190111::IGroupLPDAGMutation
1439 (TII->isVALU(MI) || TII->isMFMAorWMMA(MI) || TII->isSALU(MI) || in canAddMI()
1440 TII->isTRANS(MI))) in canAddMI()
1444 TII->isVALU(MI) && !TII->isMFMAorWMMA(MI) && !TII->isTRANS(MI)) in canAddMI()
1448 TII->isSALU(MI)) in canAddMI()
1452 TII->isMFMAorWMMA(MI)) in canAddMI()
1456 (TII->isVMEM(MI) || (TII->isFLAT(MI) && !TII->isDS(MI)))) in canAddMI()
1461 (TII->isVMEM(MI) || (TII->isFLAT(MI) && !TII->isDS(MI)))) in canAddMI()
1466 (TII->isVMEM(MI) || (TII->isFLAT(MI) && !TII->isDS(MI)))) in canAddMI()
1470 TII->isDS(MI)) in canAddMI()
1474 MI.mayLoad() && TII->isDS(MI)) in canAddMI()
1478 MI.mayStore() && TII->isDS(MI)) in canAddMI()
1482 TII->isTRANS(MI)) in canAddMI()
1607 TII = ST.getInstrInfo(); in apply()
1648 SchedGroup SG(InvertedMask, std::nullopt, DAG, TII); in addSchedBarrierEdges()
1709 Size, SyncID, DAG, TII); in initSchedGroupBarrierPipelineStage()
1717 auto S = createIGLPStrategy(StrategyID, DAG, TII); in initIGLPOpt()