258                            ? extendRegister(Arg.Regs[ValRegIndex], VA)  in assignValueToAddress()
259                            : Arg.Regs[ValRegIndex];  in assignValueToAddress()
332         assert(RetInfo.Regs.size() == 1 && "expect only simple return values");  in lowerReturnVal()
335         assert(RetInfo.Regs.size() == 1 && "expect only simple return values");  in lowerReturnVal()
348     if (Reg != RetInfo.Regs[0]) {  in lowerReturnVal()
349       RetInfo.Regs[0] = Reg;  in lowerReturnVal()
448     assert(SplitArg.Regs.size() == 1);  in lowerParameter()
450     B.buildLoad(SplitArg.Regs[0], PtrReg, *MMO);  in lowerParameter()
1217     assert(ExecArg.Regs.size() == 1 && "Too many regs for EXEC");  in lowerTailCall()
1225       MIB.addReg(ExecArg.Regs[0]);  in lowerTailCall()
1362     assert(Callee.Regs.size() == 1 && "Too many regs for the callee");  in lowerChainCall()
1363     Info.Callee = MachineOperand::CreateReg(Callee.Regs[0], false);  in lowerChainCall()
1528     insertSRetLoads(MIRBuilder, Info.OrigRet.Ty, Info.OrigRet.Regs,  in lowerCall()