Lines Matching refs:ElementWidth
381 int ElementWidth; member
406 unsigned ElementWidth; member
419 unsigned ElementWidth; member
669 return MatrixReg.ElementWidth; in getMatrixElementWidth()
1282 template <int ElementWidth, unsigned Class>
1287 if (isSVEVectorReg<Class>() && (Reg.ElementWidth == ElementWidth)) in isSVEPredicateVectorRegOfWidth()
1293 template <int ElementWidth, unsigned Class>
1298 if (isSVEPredicateAsCounterReg<Class>() && (Reg.ElementWidth == ElementWidth)) in isSVEPredicateAsCounterRegOfWidth()
1304 template <int ElementWidth, unsigned Class>
1309 if (isSVEVectorReg<Class>() && Reg.ElementWidth == ElementWidth) in isSVEDataVectorRegOfWidth()
1315 template <int ElementWidth, unsigned Class,
1319 auto VectorMatch = isSVEDataVectorRegOfWidth<ElementWidth, Class>(); in isSVEDataVectorRegWithShiftExtend()
1409 unsigned ElementWidth, unsigned Stride = 1>
1417 if (VectorList.ElementWidth != ElementWidth) in isTypedVectorList()
1425 unsigned ElementWidth>
1428 isTypedVectorList<VectorKind, NumRegs, NumElements, ElementWidth>(); in isTypedVectorListMultiple()
1437 unsigned ElementWidth>
1440 ElementWidth, Stride>(); in isTypedVectorListStrided()
2242 Op->Reg.ElementWidth = 0; in CreateReg()
2253 CreateVectorReg(unsigned RegNum, RegKind Kind, unsigned ElementWidth, in CreateVectorReg() argument
2264 Op->Reg.ElementWidth = ElementWidth; in CreateVectorReg()
2270 unsigned NumElements, unsigned ElementWidth, in CreateVectorList() argument
2277 Op->VectorList.ElementWidth = ElementWidth; in CreateVectorList()
2303 const unsigned ElementWidth) { in ComputeRegsForAlias() argument
2322 if (ElementWidth == 64) in ComputeRegsForAlias()
2325 std::vector<unsigned> Regs = RegMap[std::make_pair(ElementWidth, Reg)]; in ComputeRegsForAlias()
2463 CreateMatrixRegister(unsigned RegNum, unsigned ElementWidth, MatrixKind Kind, in CreateMatrixRegister() argument
2467 Op->MatrixReg.ElementWidth = ElementWidth; in CreateMatrixRegister()
3494 unsigned ElementWidth = 0; in tryParseMatrixRegister() local
3502 ElementWidth = KindRes->second; in tryParseMatrixRegister()
3505 AArch64::ZA, ElementWidth, MatrixKind::Array, S, getLoc(), in tryParseMatrixRegister()
3538 unsigned ElementWidth = KindRes->second; in tryParseMatrixRegister() local
3543 Reg, ElementWidth, Kind, S, getLoc(), getContext())); in tryParseMatrixRegister()
4101 unsigned ElementWidth = KindRes->second; in tryParseNeonVectorRegister() local
4103 AArch64Operand::CreateVectorReg(Reg, RegKind::NeonVector, ElementWidth, in tryParseNeonVectorRegister()
4186 unsigned ElementWidth = KindRes->second; in tryParseSVEPredicateVector() local
4188 RegNum, RK, ElementWidth, S, in tryParseSVEPredicateVector()
4332 unsigned &ElementWidth) -> ParseStatus { in tryParseMatrixTileList() argument
4348 ElementWidth = KindRes->second; in tryParseMatrixTileList()
4379 unsigned FirstReg, ElementWidth; in tryParseMatrixTileList() local
4380 auto ParseRes = ParseMatrixTile(FirstReg, ElementWidth); in tryParseMatrixTileList()
4391 AArch64Operand::ComputeRegsForAlias(FirstReg, DRegs, ElementWidth); in tryParseMatrixTileList()
4404 if (ElementWidth != NextElementWidth) in tryParseMatrixTileList()
4414 AArch64Operand::ComputeRegsForAlias(Reg, DRegs, ElementWidth); in tryParseMatrixTileList()
4544 unsigned ElementWidth = 0; in tryParseVectorList() local
4547 std::tie(NumElements, ElementWidth) = *VK; in tryParseVectorList()
4551 FirstReg, Count, Stride, NumElements, ElementWidth, VectorKind, S, in tryParseVectorList()
7868 unsigned ElementWidth = KindRes->second; in tryParseSVEDataVector() local
7873 RegNum, RegKind::SVEDataVector, ElementWidth, S, S, getContext())); in tryParseSVEDataVector()
7892 RegNum, RegKind::SVEDataVector, ElementWidth, S, Ext->getEndLoc(), in tryParseSVEDataVector()