Lines Matching refs:AArch64Subtarget
84 unsigned AArch64Subtarget::getVectorInsertExtractBaseCost() const { in getVectorInsertExtractBaseCost()
90 AArch64Subtarget &AArch64Subtarget::initializeSubtargetDependencies( in initializeSubtargetDependencies()
107 void AArch64Subtarget::initializeProperties(bool HasMinSize) { in initializeProperties()
311 AArch64Subtarget::AArch64Subtarget(const Triple &TT, StringRef CPU, in AArch64Subtarget() function in AArch64Subtarget
363 const CallLowering *AArch64Subtarget::getCallLowering() const { in getCallLowering()
367 const InlineAsmLowering *AArch64Subtarget::getInlineAsmLowering() const { in getInlineAsmLowering()
371 InstructionSelector *AArch64Subtarget::getInstructionSelector() const { in getInstructionSelector()
375 const LegalizerInfo *AArch64Subtarget::getLegalizerInfo() const { in getLegalizerInfo()
379 const RegisterBankInfo *AArch64Subtarget::getRegBankInfo() const { in getRegBankInfo()
386 AArch64Subtarget::ClassifyGlobalReference(const GlobalValue *GV, in ClassifyGlobalReference()
426 unsigned AArch64Subtarget::classifyGlobalFunctionReference( in classifyGlobalFunctionReference()
462 void AArch64Subtarget::overrideSchedPolicy(MachineSchedPolicy &Policy, in overrideSchedPolicy()
474 bool AArch64Subtarget::enableEarlyIfConversion() const { in enableEarlyIfConversion()
478 bool AArch64Subtarget::supportsAddressTopByteIgnored() const { in supportsAddressTopByteIgnored()
492 AArch64Subtarget::getCustomPBQPConstraints() const { in getCustomPBQPConstraints()
496 void AArch64Subtarget::mirFileLoaded(MachineFunction &MF) const { in mirFileLoaded()
506 bool AArch64Subtarget::useAA() const { return UseAA; } in useAA()
508 bool AArch64Subtarget::isStreamingCompatible() const { in isStreamingCompatible()
512 bool AArch64Subtarget::isNeonAvailable() const { in isNeonAvailable()
517 bool AArch64Subtarget::isSVEAvailable() const { in isSVEAvailable()
536 AArch64Subtarget::getAuthenticatedLRCheckMethod() const { in getAuthenticatedLRCheckMethod()