Lines Matching refs:StReg
188 bool processSeqRegInst(MachineInstr *DefiningMI, unsigned* StReg,
509 unsigned StReg[4], StRegKill[4]; in optimizeLdStInterleave() local
525 if (!processSeqRegInst(DefiningMI, StReg, StRegKill, NumReg)) in optimizeLdStInterleave()
567 .addReg(StReg[0]) in optimizeLdStInterleave()
568 .addReg(StReg[1]); in optimizeLdStInterleave()
570 .addReg(StReg[0], StRegKill[0]) in optimizeLdStInterleave()
571 .addReg(StReg[1], StRegKill[1]); in optimizeLdStInterleave()
589 .addReg(StReg[0]) in optimizeLdStInterleave()
590 .addReg(StReg[2]); in optimizeLdStInterleave()
592 .addReg(StReg[0], StRegKill[0]) in optimizeLdStInterleave()
593 .addReg(StReg[2], StRegKill[2]); in optimizeLdStInterleave()
595 .addReg(StReg[1]) in optimizeLdStInterleave()
596 .addReg(StReg[3]); in optimizeLdStInterleave()
598 .addReg(StReg[1], StRegKill[1]) in optimizeLdStInterleave()
599 .addReg(StReg[3], StRegKill[3]); in optimizeLdStInterleave()
636 unsigned* StReg, unsigned* StRegKill, unsigned NumArg) const { in processSeqRegInst() argument
642 StReg[i] = DefiningMI->getOperand(2*i+1).getReg(); in processSeqRegInst()