299   Register Scavenged = RS->FindUnusedReg(&AArch64::GPR64RegClass);  in insertIndirectBranch()
834   if (MRI.constrainRegClass(DstReg, &AArch64::GPR64RegClass)) {  in insertSelect()
835     RC = &AArch64::GPR64RegClass;  in insertSelect()
2148             AArch64::GPR64RegClass.contains(DstReg));  in isGPRCopy()
3446     if (RC->hasSuperClassEq(&AArch64::GPR64RegClass)) {  in emitLdStWithAddr()
4692       AArch64::GPR64RegClass.contains(SrcReg)) {  in copyPhysReg()
4697   if (AArch64::GPR64RegClass.contains(DestReg) &&  in copyPhysReg()
4718     assert(AArch64::GPR64RegClass.contains(SrcReg) && "Invalid NZCV copy");  in copyPhysReg()
4727     assert(AArch64::GPR64RegClass.contains(DestReg) && "Invalid NZCV copy");  in copyPhysReg()
4828         MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::GPR64RegClass);  in storeRegToStackSlot()
5008         MF.getRegInfo().constrainRegClass(DestReg, &AArch64::GPR64RegClass);  in loadRegFromStackSlot()
5332         &AArch64::GPR64RegClass);  in emitFrameOffsetAdj()
5483       MF.getRegInfo().constrainRegClass(DstReg, &AArch64::GPR64RegClass);  in foldMemoryOperandImpl()
5487       MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::GPR64RegClass);  in foldMemoryOperandImpl()
5565                           FrameIndex, &AArch64::GPR64RegClass, &TRI,  in foldMemoryOperandImpl()
6964       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
6979       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
7005       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
7065       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
7089       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
7115       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
8179   for (unsigned Reg : AArch64::GPR64RegClass) {  in findRegisterToSaveLRTo()