Lines Matching refs:SetFlags
204 const Value *RHS, bool SetFlags = false,
207 unsigned RHSReg, bool SetFlags = false,
210 uint64_t Imm, bool SetFlags = false,
214 uint64_t ShiftImm, bool SetFlags = false,
218 uint64_t ShiftImm, bool SetFlags = false,
236 bool SetFlags = false, bool WantResult = true,
240 bool SetFlags = false, bool WantResult = true,
1165 const Value *RHS, bool SetFlags, in emitAddSub() argument
1219 ResultReg = emitAddSub_ri(!UseAdd, RetVT, LHSReg, -Imm, SetFlags, in emitAddSub()
1222 ResultReg = emitAddSub_ri(UseAdd, RetVT, LHSReg, Imm, SetFlags, in emitAddSub()
1226 ResultReg = emitAddSub_ri(UseAdd, RetVT, LHSReg, 0, SetFlags, WantResult); in emitAddSub()
1238 SetFlags, WantResult); in emitAddSub()
1257 ShiftVal, SetFlags, WantResult); in emitAddSub()
1280 ShiftVal, SetFlags, WantResult); in emitAddSub()
1295 return emitAddSub_rr(UseAdd, RetVT, LHSReg, RHSReg, SetFlags, WantResult); in emitAddSub()
1299 unsigned RHSReg, bool SetFlags, in emitAddSub_rr() argument
1317 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit]; in emitAddSub_rr()
1336 uint64_t Imm, bool SetFlags, in emitAddSub_ri() argument
1359 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit]; in emitAddSub_ri()
1361 if (SetFlags) in emitAddSub_ri()
1383 uint64_t ShiftImm, bool SetFlags, in emitAddSub_rs() argument
1403 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit]; in emitAddSub_rs()
1425 uint64_t ShiftImm, bool SetFlags, in emitAddSub_rx() argument
1444 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit]; in emitAddSub_rx()
1446 if (SetFlags) in emitAddSub_rx()
1533 bool SetFlags, bool WantResult, bool IsZExt) { in emitAdd() argument
1534 return emitAddSub(/*UseAdd=*/true, RetVT, LHS, RHS, SetFlags, WantResult, in emitAdd()
1562 bool SetFlags, bool WantResult, bool IsZExt) { in emitSub() argument
1563 return emitAddSub(/*UseAdd=*/false, RetVT, LHS, RHS, SetFlags, WantResult, in emitSub()