382                                                    : &AArch64::GPR32RegClass;  in materializeInt()
414         &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in materializeFP()
472       ResultReg = createResultReg(&AArch64::GPR32RegClass);  in materializeGV()
1319       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitAddSub_rr()
1362     RC = Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitAddSub_ri()
1405       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitAddSub_rs()
1447     RC = Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitAddSub_rx()
1729     RC = &AArch64::GPR32RegClass;  in emitLogicalOp_rs()
1835              &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;  in emitLoad()
1840              &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;  in emitLoad()
1845              &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;  in emitLoad()
2544     ResultReg = createResultReg(&AArch64::GPR32RegClass);  in selectCmp()
2563   ResultReg = createResultReg(&AArch64::GPR32RegClass);  in selectCmp()
2584     Register TmpReg1 = createResultReg(&AArch64::GPR32RegClass);  in selectCmp()
2662   Register ResultReg = fastEmitInst_rr(Opc, &AArch64::GPR32RegClass, Src1Reg,  in optimizeSelect()
2684     RC = &AArch64::GPR32RegClass;  in selectSelect()
2847       DestVT == MVT::i32 ? &AArch64::GPR32RegClass : &AArch64::GPR64RegClass);  in selectFPToInt()
2976       RC = &AArch64::GPR32RegClass;  in fastLowerArguments()
3767     ResultReg2 = fastEmitInst_rri(AArch64::CSINCWr, &AArch64::GPR32RegClass,  in fastLowerIntrinsicCall()
3823         fastEmitInst_rr(Opc, &AArch64::GPR32RegClass, LHSReg, RHSReg);  in fastLowerIntrinsicCall()
3990     ResultReg = createResultReg(&AArch64::GPR32RegClass);  in selectTrunc()
4028     return fastEmitInst_rii(AArch64::SBFMWri, &AArch64::GPR32RegClass, SrcReg,  in emiti1Ext()
4047       (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitMul_rr()
4081       (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitLSL_rr()
4106       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitLSL_ri()
4183       (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitLSR_rr()
4209       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitLSR_ri()
4299       (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitASR_rr()
4325       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitASR_ri()
4447       (DestVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitIntExt()
4630       (DestVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in selectRem()
4819   case MVT::i32: RC = &AArch64::GPR32RegClass; break;  in selectBitCast()
4916     RC = &AArch64::GPR32RegClass;  in selectSDiv()
5048     ResRC = &AArch64::GPR32RegClass;  in selectAtomicCmpXchg()
5067   const Register ResultReg2 = createResultReg(&AArch64::GPR32RegClass);  in selectAtomicCmpXchg()
5068   const Register ScratchReg = createResultReg(&AArch64::GPR32RegClass);  in selectAtomicCmpXchg()