155   bool convertInstTo3Addr(MachineBasicBlock::iterator &mi,
161   bool rescheduleMIBelowKill(MachineBasicBlock::iterator &mi,
163   bool rescheduleKillAboveMI(MachineBasicBlock::iterator &mi,
166   bool tryInstructionTransform(MachineBasicBlock::iterator &mi,
714     MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi,  in convertInstTo3Addr()  argument
716   MachineInstrSpan MIS(mi, MBB);  in convertInstTo3Addr()
717   MachineInstr *NewMI = TII->convertToThreeAddress(*mi, LV, LIS);  in convertInstTo3Addr()
721   LLVM_DEBUG(dbgs() << "2addr: CONVERTING 2-ADDR: " << *mi);  in convertInstTo3Addr()
725   if (auto OldInstrNum = mi->peekDebugInstrNum()) {  in convertInstTo3Addr()
726     assert(mi->getNumExplicitDefs() == 1);  in convertInstTo3Addr()
730     unsigned OldIdx = mi->defs().begin()->getOperandNo();  in convertInstTo3Addr()
739   MBB->erase(mi); // Nuke the old inst.  in convertInstTo3Addr()
744   mi = NewMI;  in convertInstTo3Addr()
745   nmi = std::next(mi);  in convertInstTo3Addr()
835     MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi,  in rescheduleMIBelowKill()  argument
842   MachineInstr *MI = &*mi;  in rescheduleMIBelowKill()
1023     MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi,  in rescheduleKillAboveMI()  argument
1030   MachineInstr *MI = &*mi;  in rescheduleKillAboveMI()
1093        make_range(mi, MachineBasicBlock::iterator(KillMI))) {  in rescheduleKillAboveMI()
1138   MachineBasicBlock::iterator InsertPos = mi;  in rescheduleKillAboveMI()
1240 tryInstructionTransform(MachineBasicBlock::iterator &mi,  in tryInstructionTransform()  argument
1247   MachineInstr &MI = *mi;  in tryInstructionTransform()
1275   if (!Commuted && EnableRescheduling && rescheduleMIBelowKill(mi, nmi, regB)) {  in tryInstructionTransform()
1292       if (convertInstTo3Addr(mi, nmi, regA, regB, Dist)) {  in tryInstructionTransform()
1305   if (EnableRescheduling && rescheduleKillAboveMI(mi, nmi, regB)) {  in tryInstructionTransform()
1349         MBB->insert(mi, NewMIs[0]);  in tryInstructionTransform()
1350         MBB->insert(mi, NewMIs[1]);  in tryInstructionTransform()
1362           tryInstructionTransform(NewMI, mi, NewSrcIdx, NewDstIdx, Dist, true);  in tryInstructionTransform()
1416           mi = NewMIs[1];  in tryInstructionTransform()
1792     for (MachineBasicBlock::iterator mi = MBB->begin(), me = MBB->end();  in runOnMachineFunction()  local
1793          mi != me; ) {  in runOnMachineFunction()
1794       MachineBasicBlock::iterator nmi = std::next(mi);  in runOnMachineFunction()
1796       if (mi->isDebugInstr()) {  in runOnMachineFunction()
1797         mi = nmi;  in runOnMachineFunction()
1803       if (mi->isRegSequence())  in runOnMachineFunction()
1804         eliminateRegSequence(mi);  in runOnMachineFunction()
1806       DistanceMap.insert(std::make_pair(&*mi, ++Dist));  in runOnMachineFunction()
1808       processCopy(&*mi);  in runOnMachineFunction()
1812       if (!collectTiedOperands(&*mi, TiedOperands)) {  in runOnMachineFunction()
1813         removeClobberedSrcRegMap(&*mi);  in runOnMachineFunction()
1814         mi = nmi;  in runOnMachineFunction()
1820       LLVM_DEBUG(dbgs() << '\t' << *mi);  in runOnMachineFunction()
1831           Register SrcReg = mi->getOperand(SrcIdx).getReg();  in runOnMachineFunction()
1832           Register DstReg = mi->getOperand(DstIdx).getReg();  in runOnMachineFunction()
1834               tryInstructionTransform(mi, nmi, SrcIdx, DstIdx, Dist, false)) {  in runOnMachineFunction()
1838             removeClobberedSrcRegMap(&*mi);  in runOnMachineFunction()
1839             mi = nmi;  in runOnMachineFunction()
1845       if (mi->getOpcode() == TargetOpcode::STATEPOINT &&  in runOnMachineFunction()
1846           processStatepoint(&*mi, TiedOperands)) {  in runOnMachineFunction()
1848         LLVM_DEBUG(dbgs() << "\t\trewrite to:\t" << *mi);  in runOnMachineFunction()
1849         mi = nmi;  in runOnMachineFunction()
1855         processTiedPairs(&*mi, TO.second, Dist);  in runOnMachineFunction()
1856         LLVM_DEBUG(dbgs() << "\t\trewrite to:\t" << *mi);  in runOnMachineFunction()
1860       if (mi->isInsertSubreg()) {  in runOnMachineFunction()
1863         unsigned SubIdx = mi->getOperand(3).getImm();  in runOnMachineFunction()
1864         mi->removeOperand(3);  in runOnMachineFunction()
1865         assert(mi->getOperand(0).getSubReg() == 0 && "Unexpected subreg idx");  in runOnMachineFunction()
1866         mi->getOperand(0).setSubReg(SubIdx);  in runOnMachineFunction()
1867         mi->getOperand(0).setIsUndef(mi->getOperand(1).isUndef());  in runOnMachineFunction()
1868         mi->removeOperand(1);  in runOnMachineFunction()
1869         mi->setDesc(TII->get(TargetOpcode::COPY));  in runOnMachineFunction()
1870         LLVM_DEBUG(dbgs() << "\t\tconvert to:\t" << *mi);  in runOnMachineFunction()
1874           Register Reg = mi->getOperand(0).getReg();  in runOnMachineFunction()
1880                 TRI->getSubRegIndexLaneMask(mi->getOperand(0).getSubReg());  in runOnMachineFunction()
1881             SlotIndex Idx = LIS->getInstructionIndex(*mi).getRegSlot();  in runOnMachineFunction()
1885                 if (mi->getOperand(0).isUndef()) {  in runOnMachineFunction()
1908       removeClobberedSrcRegMap(&*mi);  in runOnMachineFunction()
1909       mi = nmi;  in runOnMachineFunction()