Lines Matching refs:LIS

96   LiveIntervals *LIS = nullptr;  member in __anon5b6650e30111::TwoAddressInstructionPass
315 SlotIndex useIdx = LIS->getInstructionIndex(*MI); in isPlainlyKilled()
331 if (LIS && !LIS->isNotInMIMap(*MI)) { in isPlainlyKilled()
333 return isPlainlyKilled(MI, LIS->getInterval(Reg)); in isPlainlyKilled()
338 return isPlainlyKilled(MI, LIS->getRegUnit(U)); in isPlainlyKilled()
717 MachineInstr *NewMI = TII->convertToThreeAddress(*mi, LV, LIS); in convertInstTo3Addr()
839 if (!LV && !LIS) in rescheduleMIBelowKill()
849 if (LIS) { in rescheduleMIBelowKill()
850 LiveInterval &LI = LIS->getInterval(Reg); in rescheduleMIBelowKill()
854 SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot(); in rescheduleMIBelowKill()
860 KillMI = LIS->getInstructionFromIndex(I->end); in rescheduleMIBelowKill()
970 if (LIS) { in rescheduleMIBelowKill()
977 LIS->handleMove(*CopyMI); in rescheduleMIBelowKill()
988 if (LIS) { in rescheduleMIBelowKill()
989 LIS->handleMove(*MI); in rescheduleMIBelowKill()
1027 if (!LV && !LIS) in rescheduleKillAboveMI()
1037 if (LIS) { in rescheduleKillAboveMI()
1038 LiveInterval &LI = LIS->getInterval(Reg); in rescheduleKillAboveMI()
1042 SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot(); in rescheduleKillAboveMI()
1048 KillMI = LIS->getInstructionFromIndex(I->end); in rescheduleKillAboveMI()
1151 if (LIS) { in rescheduleKillAboveMI()
1152 LIS->handleMove(*KillMI); in rescheduleKillAboveMI()
1397 if (LIS) { in tryInstructionTransform()
1403 LIS->RemoveMachineInstrFromMaps(MI); in tryInstructionTransform()
1410 if (LIS) { in tryInstructionTransform()
1413 LIS->repairIntervalsInRange(MBB, Begin, End, OrigRegs); in tryInstructionTransform()
1550 if (LIS) { in processTiedPairs()
1551 LastCopyIdx = LIS->InsertMachineInstrInMaps(*PrevMI).getRegSlot(); in processTiedPairs()
1554 LIS->getInstructionIndex(*MI).getRegSlot(IsEarlyClobber); in processTiedPairs()
1556 LiveInterval &LI = LIS->getInterval(RegA); in processTiedPairs()
1557 VNInfo *VNI = LI.getNextValue(LastCopyIdx, LIS->getVNInfoAllocator()); in processTiedPairs()
1560 VNI = S.getNextValue(LastCopyIdx, LIS->getVNInfoAllocator()); in processTiedPairs()
1565 if (LiveRange *LR = LIS->getCachedRegUnit(Unit)) { in processTiedPairs()
1567 LR->getNextValue(LastCopyIdx, LIS->getVNInfoAllocator()); in processTiedPairs()
1624 if (LIS) { in processTiedPairs()
1625 SlotIndex UseIdx = LIS->getInstructionIndex(*MI); in processTiedPairs()
1638 LiveInterval &LI = LIS->getInterval(RegB); in processTiedPairs()
1693 if (LIS) { in processStatepoint()
1694 const auto &UseLI = LIS->getInterval(RegB); in processStatepoint()
1695 const auto &DefLI = LIS->getInterval(RegA); in processStatepoint()
1721 if (LIS) { in processStatepoint()
1722 VNInfo::Allocator &A = LIS->getVNInfoAllocator(); in processStatepoint()
1723 LiveInterval &LI = LIS->getInterval(RegB); in processStatepoint()
1724 LiveInterval &Other = LIS->getInterval(RegA); in processStatepoint()
1735 LIS->removeInterval(RegA); in processStatepoint()
1761 LIS = getAnalysisIfAvailable<LiveIntervals>(); in runOnMachineFunction()
1873 if (LIS) { in runOnMachineFunction()
1875 LiveInterval &LI = LIS->getInterval(Reg); in runOnMachineFunction()
1881 SlotIndex Idx = LIS->getInstructionIndex(*mi).getRegSlot(); in runOnMachineFunction()
1895 LIS->shrinkToUses(&LI); in runOnMachineFunction()
1899 LIS->removeInterval(Reg); in runOnMachineFunction()
1900 LIS->createAndComputeVirtRegInterval(Reg); in runOnMachineFunction()
1932 if (LIS) { in eliminateRegSequence()
1993 if (LIS) { in eliminateRegSequence()
1996 if (DefIsPartial && LIS->hasInterval(DstReg) && in eliminateRegSequence()
1998 LIS->removeInterval(DstReg); in eliminateRegSequence()
1999 LIS->RemoveMachineInstrFromMaps(MI); in eliminateRegSequence()
2007 if (LIS) in eliminateRegSequence()
2008 LIS->repairIntervalsInRange(MBB, MBBI, EndMBBI, OrigRegs); in eliminateRegSequence()