Lines Matching refs:IntvOut
1637 unsigned IntvOut, SlotIndex EnterAfter){ in splitLiveThroughBlock() argument
1643 << ", live-through " << IntvIn << " -> " << IntvOut); in splitLiveThroughBlock()
1645 assert((IntvIn || IntvOut) && "Use splitSingleBlock for isolated blocks"); in splitLiveThroughBlock()
1653 if (!IntvOut) { in splitLiveThroughBlock()
1674 selectIntv(IntvOut); in splitLiveThroughBlock()
1681 if (IntvIn == IntvOut && !LeaveBefore && !EnterAfter) { in splitLiveThroughBlock()
1687 selectIntv(IntvOut); in splitLiveThroughBlock()
1694 assert((!IntvOut || !EnterAfter || EnterAfter < LSP) && "Impossible intf"); in splitLiveThroughBlock()
1696 if (IntvIn != IntvOut && (!LeaveBefore || !EnterAfter || in splitLiveThroughBlock()
1704 selectIntv(IntvOut); in splitLiveThroughBlock()
1727 selectIntv(IntvOut); in splitLiveThroughBlock()
1832 unsigned IntvOut, SlotIndex EnterAfter) { in splitRegOutBlock() argument
1838 << BI.LastInstr << ", reg-out " << IntvOut in splitRegOutBlock()
1844 assert(IntvOut && "Must have register out"); in splitRegOutBlock()
1855 selectIntv(IntvOut); in splitRegOutBlock()
1867 selectIntv(IntvOut); in splitRegOutBlock()
1883 selectIntv(IntvOut); in splitRegOutBlock()