Lines Matching refs:IntvIn
1636 unsigned IntvIn, SlotIndex LeaveBefore, in splitLiveThroughBlock() argument
1643 << ", live-through " << IntvIn << " -> " << IntvOut); in splitLiveThroughBlock()
1645 assert((IntvIn || IntvOut) && "Use splitSingleBlock for isolated blocks"); in splitLiveThroughBlock()
1648 assert((!IntvIn || !LeaveBefore || LeaveBefore > Start) && "Impossible intf"); in splitLiveThroughBlock()
1660 selectIntv(IntvIn); in splitLiveThroughBlock()
1667 if (!IntvIn) { in splitLiveThroughBlock()
1681 if (IntvIn == IntvOut && !LeaveBefore && !EnterAfter) { in splitLiveThroughBlock()
1696 if (IntvIn != IntvOut && (!LeaveBefore || !EnterAfter || in splitLiveThroughBlock()
1712 selectIntv(IntvIn); in splitLiveThroughBlock()
1732 selectIntv(IntvIn); in splitLiveThroughBlock()
1739 unsigned IntvIn, SlotIndex LeaveBefore) { in splitRegInBlock() argument
1745 << BI.LastInstr << ", reg-in " << IntvIn in splitRegInBlock()
1749 assert(IntvIn && "Must have register in"); in splitRegInBlock()
1760 selectIntv(IntvIn); in splitRegInBlock()
1780 selectIntv(IntvIn); in splitRegInBlock()
1786 selectIntv(IntvIn); in splitRegInBlock()
1811 selectIntv(IntvIn); in splitRegInBlock()
1826 selectIntv(IntvIn); in splitRegInBlock()